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The SOC Design Engineer will collaborate with teams to design and integrate complex SOCs, oversee chip-level simulations, and enhance development automation tools. Candidates need experience in SOC design, coding, and verification.

The intern will verify chip circuitry using Verilog, run simulations, and debug designs to meet customer specifications while collaborating with engineers and attending meetings.

The Senior Director, HR Business Partner will lead HR initiatives, manage a team, and influence strategies to enhance employee engagement, talent development, and organizational design in a fast-paced environment.

Intern will design tools for lab testing, assist with customer issues, support test design, and create documentation.

Assist in PCB circuit design, FPGA coding, lab testing, and measurement data collection, along with preparing reports and presentations.

Design and verify analog and mixed-signal IC circuits including PLLs, ADCs, and regulators, utilizing industry-standard tools for performance targets.

Design mixed-signal CMOS transceivers and SERDES products, focusing on circuit architecture, verification, and interaction with cross-functional teams. Requires hands-on experience in analog circuit design and lab testing.

Marvell is seeking a PhD intern approved for the 2026 calendar year to contribute to semiconductor solutions in various sectors. The candidate will play a role in innovative technology development.

Design highly sophisticated CMOS transceiver/SERDES products and implement circuits like PLL, ADC, regulators, etc. Verify designs using standard tools.

The role involves supporting PCIe interconnect products by resolving customer issues, duplicating problems for debugging, and facilitating communication between customers and engineering. Responsibilities include training customers, developing technical materials, and occasional travel.