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Reposted 25 Days AgoSaved
In-Office
Santa Clara, CA, USA
242K-363K Annually
Senior level
242K-363K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
As a Senior Distinguished Engineer, you will lead architectural vision for high-performance switch ASICs, mentor engineers, and collaborate across teams to shape next-gen networking products.
Top Skills: AsicEthernet Io SubsystemsHigh-Performance SocsIeee 802.3 Mac/Pcs/FecNetworkingSerdes
Reposted 25 Days AgoSaved
In-Office
Santa Clara, CA, USA
114K-170K Annually
Senior level
114K-170K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
Manage executive travel and global events, including planning and executing events worldwide, vendor management, budgeting, and providing exceptional executive travel experiences.
Top Skills: Event Planning ToolsGoogle WorkspaceMS OfficeTravel Management Software
Reposted 25 Days AgoSaved
In-Office
3 Locations
131K-194K Annually
Senior level
131K-194K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
As a Principal Financial Analyst, drive annual operating plans, engage in forecasting, and consolidate P&L projections. Collaborate closely with top leadership to present insights and maintain financial models while championing automation initiatives.
Top Skills: BiExcelOnestreamOraclePowerPoint
Reposted 25 Days AgoSaved
In-Office
Santa Clara, CA, USA
141K-211K Annually
Senior level
141K-211K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
This role involves developing semiconductor solutions with a focus on signal and power integrity, impacting data infrastructure across multiple architectures.
Top Skills: Ai ArchitectureCloud ArchitectureData InfrastructureEnterprise ArchitecturePower IntegritySemiconductor SolutionsSignal Integrity
Reposted 25 Days AgoSaved
In-Office
Westlake Village, CA, USA
142K-210K Annually
Senior level
142K-210K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
Design and validate FET and BiCMOS circuits for high-speed broadband integrated circuits, including analog and mixed-signal circuits. Collaborate across teams for validation and production.
Top Skills: CmosEda Cad ToolsSige Bicmos
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Reposted 25 Days AgoSaved
In-Office
Santa Clara, CA, USA
159K-238K Annually
Senior level
159K-238K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The Principal Verification Engineer will develop test benches, execute test-plans, debug simulations, and mentor junior engineers in the verification of SoCs for AI and cloud data center applications.
Top Skills: C/C++DpiSystem VerilogUvm
Reposted 25 Days AgoSaved
In-Office
Santa Clara, CA, USA
151K-226K Annually
Senior level
151K-226K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The Principal Analog/Mixed-Signal CAD Engineer will develop automated design flows, support analog design teams, and enhance productivity for advanced silicon programs.
Top Skills: AfsAms DesignerBicmosCadence AdeCmos FinfetPerlPythonSkillSpectreSynopsys PrimesimTcl
Reposted 25 Days AgoSaved
In-Office
3 Locations
136K-201K Annually
Senior level
136K-201K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The Senior Staff Digital Design Engineer will lead the design and development of complex ASICs for connectivity solutions, focusing on high-speed datapaths and DSP-driven processing engines in collaboration with architecture and verification teams.
Top Skills: Asic DesignC/C++DspEthernet ProtocolsFpgaSystemverilog
Reposted 25 Days AgoSaved
In-Office
Santa Clara, CA, USA
155K-232K Annually
Senior level
155K-232K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The role involves leading customer engagements, defining CPO solutions, and supporting the integration and testing of advanced packaging in optics-related designs. Candidates need extensive experience in high-speed interconnects and optical systems.
Top Skills: Advanced PackagingCo-Packaged Optics (Cpo)Electrical EngineeringHigh-Speed InterconnectsOptical EngineeringPhotonicsPower DeliverySignal IntegritySilicon PhotonicsThermal Management
Reposted 25 Days AgoSaved
In-Office
Santa Clara, CA, USA
131K-196K Annually
Mid level
131K-196K Annually
Mid level
Artificial Intelligence • Automotive • Semiconductor
The Rack Level Integration Engineer will validate and integrate components within AI compute racks, leading design and implementation for performance and reliability.
Top Skills: Mechanical Cad ToolsThermal Cad Tools
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