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Lead the development of complex SubSystem emulation models, drive emulation strategy, and collaborate across teams to ensure seamless integration and performance optimization.

The Senior Staff Emulation Engineer will drive emulation strategy, build complex subsystem emulation models, and collaborate with design teams to ensure quality designs for SoCs.

The Principal Hardware Design Engineer will design high-speed PCB for SOC validation, set SI specifications, and collaborate with teams on implementation and power integrity analysis.

Design and verify analog circuits for CMOS transceivers/SERDES products, requiring hands-on experience and innovative problem-solving skills.

The role involves architecting and implementing high-speed analog and mixed-signal circuits for photonic transceivers, collaborating with multidisciplinary teams, defining specifications, and enhancing system performance.

Design and execute DFT and ATPG flows for custom silicon: insert and verify scan, MBIST, and IP test; generate and simulate test patterns; analyze coverage; support manufacturing test bring-up and debug; collaborate on flow improvements.

The role involves SoC microarchitecture, RTL design, full-chip integration, and collaboration with verification teams to ensure performance and functionality of high-performance designs.

The role involves designing and developing advanced broadband transceivers, requiring expertise in CMOS analog design, IC design flow, and experience with FinFET and data converters.

The Principal Physical Design Engineer will drive physical design improvements, own RTL-to-GDSII implementation, mentor junior engineers, and collaborate with cross-functional teams.

The role involves verifying chip circuitry, developing test plans, debugging, and ensuring compliance with specifications for high-speed data transfers.