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The role involves supporting Marvell's Optical PAM4 DSP products, interfacing with customers to resolve technical issues, and collaborating with teams to relay customer needs.

The ASIC Architect leads the design and development of SoC architectures, collaborating across teams to deliver innovative solutions while conducting performance analysis and documentation.

The role involves designing and implementing micro-architecture for mixed signal ICs, supervising design engineers, and ensuring high performance in digital signal processing for data centers.

The Senior Communications Leader will shape and execute a global communications strategy, elevate the company's brand, and advise executive leadership while managing media relations and crafting impactful narratives.

The People Services Partner manages HR operations, leads service center functions, oversees onboarding/offboarding processes, and ensures compliance and audit readiness, while optimizing HR technology and analyzing operational trends.

Lead and optimize enterprise PLM processes and systems (Agile/Oracle/Teamcenter/Windchill). Manage item/doc creation, BOMs, ECOs, change workflows, data integrity, PLM integrations, testing, user privileges, training, reporting, and PLM metrics to support product lifecycle from development through production and retirement.

Lead NPI test engineering strategy and team for advanced multi-site SoCs. Drive ATE test solutions (Advantest 93K/Teradyne UltraFLEX), define DFT/testability, oversee wafer sort, characterization, and production testing, optimize test programs to reduce time and improve yield, coordinate cross-functional issue resolution, resource planning, program reviews, and standardization to accelerate time-to-market.

The Package Integration Engineer will manage packaging integration, vendor coordination, and ensure project execution from design to manufacturing while analyzing data to improve yields.

Seeking an experienced ASIC implementation and synthesis engineer to develop timing constraints, perform physical design tasks, and improve design flows using scripting and industry-standard tools.

The Staff Mechanical Design Engineer will lead the design of semiconductor test infrastructures focusing on mechanical architecture, tolerance management, and manufacturability for high power XPU and Silicon Photonics platforms.