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As a Test Development Principal Engineer, you'll develop and optimize testing strategies for semiconductor chips, ensuring they meet customer specifications and performance standards on Advantest 93K platform.

Lead a team of firmware engineers for CXL and PCIe End Point device development. Responsible for planning, execution, and delivery of software, collaborating across cross-functional groups, and mentoring team members.

Lead the SOC design team, manage high-quality SOC designs, integrate IPs, and ensure successful product execution through collaboration and technical leadership.

Design and validate FET and BiCMOS circuits for high-speed broadband integrated circuits, including analog and mixed-signal circuits. Collaborate across teams for validation and production.

The Principal Verification Engineer will develop test benches, execute test-plans, debug simulations, and mentor junior engineers in the verification of SoCs for AI and cloud data center applications.

The Principal Package Engineer drives semiconductor package development, collaborates with teams, manages suppliers, and mentors junior engineers, focusing on NPI and cost analysis.

Lead and manage an ASIC chip design team to deliver high-performance ASICs from microarchitecture through tape-out. Own technical execution, scheduling, risk management, cross-functional coordination, RTL development, synthesis, STA/timing closure, physical design, verification, subsystem integration, and PPA optimization to meet product and business goals.

The Principal Analog/Mixed-Signal CAD Engineer will develop automated design flows, support analog design teams, and enhance productivity for advanced silicon programs.

The Senior Staff Digital Design Engineer will lead the design and development of complex ASICs for connectivity solutions, focusing on high-speed datapaths and DSP-driven processing engines in collaboration with architecture and verification teams.

The role involves leading customer engagements, defining CPO solutions, and supporting the integration and testing of advanced packaging in optics-related designs. Candidates need extensive experience in high-speed interconnects and optical systems.