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The Staff Engineer for Lab Operations will oversee all aspects of the Santa Clara hardware lab, including equipment management, vendor relationships, lab organization, and logistics for customer demos and tradeshows.

Lead product management for custom hyperscale silicon targeting AI/data center customers. Own roadmap, customer engagement from exploration to volume production, market and competitive analysis, business planning, collateral, cross-functional execution, and drive design wins with hyperscalers and global sales.

Lead outbound product and technology marketing for Marvell's custom cloud silicon portfolio (custom XPUs, XPU attach, advanced IP and packaging). Define messaging, launch plans, sales enablement, thought leadership, and cross-functional alignment while protecting confidential co-development program details. Drive market positioning, analyst/media engagement, and team leadership to grow Marvell's hyperscaler and AI infrastructure presence.

Lead strategic sourcing for advanced packaging, assembly/test, and semiconductor test equipment. Develop supplier strategies, negotiate contracts, manage cross-functional stakeholders, ensure capacity and supply continuity, drive cost savings, and mitigate supply risks to support AI and data center product ramps.

The Staff Hardware Engineer will design, develop, and test electrical hardware for optical modules and AI platforms, collaborate on hardware requirements, and validate components using lab equipment.

Lead and coordinate HR M&A activities including due diligence data collection, project planning, cross-functional meetings, Day 1 readiness, vendor coordination, change communications, and integration tasks with HR COEs to ensure timely, compliant, employee-focused integrations.

Lead outbound product and technology marketing for Marvell's connectivity component portfolio. Own positioning, messaging, launches, sales enablement, thought leadership, and ecosystem engagement to drive design-wins and define interoperability standards. Partner cross-functionally with product, engineering, sales, and corporate marketing, and represent Marvell at industry forums and analyst/customer briefings.

Manage end-to-end execution of Central CAD & Design Services programs: planning, schedules, risk tracking, stakeholder cadence, CAD/EDA readiness, communications, dashboards, JIRA/Confluence/SharePoint operations, and process improvements leveraging productivity and enterprise AI tools to scale program management.

Design and implement functional verification environments for multi-core SoCs using SystemVerilog/UVM. Develop test plans, random and directed tests, coverage-driven verification, reference models, BFMs, and scripts; debug failures with designers; verify boot code and build scalable verification tools and regression infrastructure.

As a Test Development Principal Engineer, you'll develop and optimize testing strategies for semiconductor chips, ensuring they meet customer specifications and performance standards on Advantest 93K platform.