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14 Days AgoSaved
In-Office
Santa Clara, CA, USA
175K-261K Annually
Expert/Leader
175K-261K Annually
Expert/Leader
Artificial Intelligence • Automotive • Semiconductor
As a Principal High-Speed Analog Mixed Signal Design Engineer, you'll lead the design of complex analog circuits, mentor junior engineers, and collaborate with teams to ensure successful project execution and compliance with design quality requirements.
Top Skills: CmosEda Tools (CadenceMentor Graphics)Synopsys
14 Days AgoSaved
In-Office
Santa Clara, CA, USA
190K-285K Annually
Senior level
190K-285K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The Director of Application Engineering will lead a team focusing on high-speed SerDes IP, overseeing support, technical leadership, and cross-functional collaboration to ensure optimal deployment and performance across business units and customer projects.
Top Skills: AdsC/C++CeiCpriDdrEthernetFibre ChannelHigh-Speed SerdesHspiceMatlabPciePython
14 Days AgoSaved
In-Office
Santa Clara, CA, USA
155K-232K Annually
Expert/Leader
155K-232K Annually
Expert/Leader
Artificial Intelligence • Automotive • Semiconductor
The role involves leading SerDes IP integration, coordinating engineering resources, diagnosing signal integrity issues, and supporting high-speed interface applications, while managing customer technical escalations and providing documentation and presentations.
Top Skills: AsicEthernetFecHigh-Speed Serdes IpPcb LayoutPcieS-Parameter AnalysisTest Equipment
14 Days AgoSaved
In-Office
Santa Clara, CA, USA
108K-162K Annually
Mid level
108K-162K Annually
Mid level
Artificial Intelligence • Automotive • Semiconductor
The Staff Hardware Engineer will design, develop, and test electrical hardware for optical modules and AI platforms, collaborate on hardware requirements, and validate components using lab equipment.
Top Skills: AllegroAsicCad ToolsDspOrcadSilicon Photonics
15 Days AgoSaved
In-Office
Santa Clara, CA, USA
134K-201K Annually
Senior level
134K-201K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
Develop and execute verification plans for high-speed memory interfaces, enhance verification environments, and analyze/debug simulation failures. Collaborate with teams to ensure compliance and perform coverage-driven verification.
Top Skills: Ddr4Ddr5Hbm2Hbm3Lpddr4Lpddr5PerlPythonShellSystem VerilogUvm
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15 Days AgoSaved
In-Office
Santa Clara, CA, USA
134K-201K Annually
Senior level
134K-201K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The Senior Staff Design Verification Engineer will develop verification plans for high-speed memory interfaces, build verification environments, debug simulation issues, and ensure compliance with specifications in ASIC/SoC design.
Top Skills: Ddr4Ddr5Hbm2Hbm3Lpddr4Lpddr5PerlPythonShellSystem VerilogUvm
15 Days AgoSaved
In-Office
Irvine, CA, USA
177K-261K Annually
Senior level
177K-261K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The Principal Analog and Mixed-Signal IC Design Engineer will design sophisticated CMOS transceiver products, conduct architectural investigations, perform design verification, and collaborate with digital teams.
Top Skills: CmosHsimMatlabSpectreSpiceVerilog
15 Days AgoSaved
In-Office
Santa Clara, CA, USA
167K-250K Annually
Expert/Leader
167K-250K Annually
Expert/Leader
Artificial Intelligence • Automotive • Semiconductor
The Principal System Architect will lead the architecture for data center AI infrastructure, focusing on scalability, performance optimization, and customer solutions. Responsibilities include designing system architecture, evaluating new technologies, and building end-to-end solutions with a hands-on approach to AI inference and training.
Top Skills: CxlNvidia CudaPciePythonUalink
Reposted 15 Days AgoSaved
In-Office
Santa Clara, CA, USA
118K-177K Annually
Senior level
118K-177K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
As an Analog Layout Senior Staff Engineer, you will design and verify analog circuits, collaborate globally, and mentor teams through project lifecycles at Marvell.
Top Skills: Cad ToolsCadence Virtuoso
111K-166K Annually
Mid level
Artificial Intelligence • Automotive • Semiconductor
The Staff Software Engineer will design, implement, and optimize SSD firmware features, conduct failure analysis, and ensure successful cross-team collaboration for SoC production.
Top Skills: ArmCC++GerritGitGtestJIRAPython
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