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As a DFT Intern, you will refine DFT flow automation, support chip-level regression, and aid DFT verification, working closely with design teams.

The Electrical Engineer will lead schematic design for accelerator modules, collaborate on system requirements, and manage documentation and testing for hardware systems.

The Component Engineer ensures reliability and performance of electronic components, conducts evaluations, develops qualification plans, and manages lifecycle integrity while collaborating across teams and suppliers.

Support hardware bring-up and validation efforts by executing test procedures, monitoring progress, triaging failures, and maintaining accurate records in a lab environment.

Own payroll and benefits accounting close processes including accruals, reconciliations, journal entries, tax registrations, and internal controls. Reconcile payroll providers, benefits portals, and HRIS to the general ledger, support system integrations, maintain process documentation, and coordinate cross-functional payroll and compliance activities.

Provide end-to-end IT support for engineering and operations, manage endpoints and MDM/MAM, administer identity and access (SSO/IAM), design and secure networks (VPNs, VLANs, firewalls), implement EDR/XDR, automate workflows (Python/Bash/PowerShell), and coordinate vendors to maintain high operational reliability and compliance.

Build and maintain automation, CI/CD, and observability for hybrid cloud and on-prem HPC workflows. Optimize Slurm scheduling, manage containerized environments, integrate cloud resources, implement caching/artifact systems, and support security, secrets management, and developer productivity across hardware and software teams.

Lead definition of system-level performance metrics and abstractions across custom silicon, runtimes, compilers, and distributed inference clusters. Design telemetry taxonomies, cross-layer event correlation, time-alignment strategies, and cluster-scale performance reasoning. Build developer tooling and analysis engines to surface actionable insights and influence instrumentation for future hardware.

Responsible for leading manufacturing engineering strategy for AI hardware products, scaling processes from prototype to mass production, and ensuring quality execution in partnership with manufacturing partners.

The internship involves hands-on product design, development of design infrastructure, and system integration for high power ASIC systems, focusing on mechanical and electrical engineering aspects.