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Own payroll and benefits accounting close processes including accruals, reconciliations, journal entries, tax registrations, and internal controls. Reconcile payroll providers, benefits portals, and HRIS to the general ledger, support system integrations, maintain process documentation, and coordinate cross-functional payroll and compliance activities.

Manage the operations of a mechanical lab, ensuring machine maintenance, safety compliance, inventory management, and support engineering teams. Oversee additive manufacturing and maintain an organized workflow.

The Electrical Engineer will lead schematic design for accelerator modules, collaborate on system requirements, and manage documentation and testing for hardware systems.

Provide end-to-end IT support for engineering and operations, manage endpoints and MDM/MAM, administer identity and access (SSO/IAM), design and secure networks (VPNs, VLANs, firewalls), implement EDR/XDR, automate workflows (Python/Bash/PowerShell), and coordinate vendors to maintain high operational reliability and compliance.

The internship involves hands-on product design, development of design infrastructure, and system integration for high power ASIC systems, focusing on mechanical and electrical engineering aspects.

Build and maintain automation, CI/CD, and observability for hybrid cloud and on-prem HPC workflows. Optimize Slurm scheduling, manage containerized environments, integrate cloud resources, implement caching/artifact systems, and support security, secrets management, and developer productivity across hardware and software teams.

The Emulation Engineer will oversee SoC bring-up and debugging, develop automated flows for pre-silicon validation, implement hybrid emulation environments, and create chip-to-chip network models, collaborating with various teams.

As a DFT Intern, you will refine DFT flow automation, support chip-level regression, and aid DFT verification, working closely with design teams.

Lead definition of system-level performance metrics and abstractions across custom silicon, runtimes, compilers, and distributed inference clusters. Design telemetry taxonomies, cross-layer event correlation, time-alignment strategies, and cluster-scale performance reasoning. Build developer tooling and analysis engines to surface actionable insights and influence instrumentation for future hardware.

The Global Supply Manager will strategically source and manage suppliers for L11 hardware, collaborating with engineering and operations to ensure efficient production and supply chain resilience.