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As a Senior Software Engineer at Tenstorrent, you will develop AI compiler technologies, optimize computational graphs, and enhance MLIR frameworks to connect AI models with hardware.

Lead customer engagements for RISC-V CPU server and machine learning processor projects, coordinating with engineering teams and managing technical program requirements.

The Physical Design Engineer will lead efforts in solving physical design challenges, improve RTL-to-GDS methodologies, and integrate AI/ML solutions into CAD flows, focusing on performance and runtime improvements.

As a SOC Emulation Engineer, you'll support hardware emulation infrastructure, integrating hardware transactors and developing Python-based test frameworks while providing technical support across chip projects.

Lead CPU core-level testbench development and verification for high-performance out-of-order RISC-V CPUs, involving hands-on infrastructure development and debugging using AI methodologies.

The role involves defining and implementing RTL for high-performance RISC-V CPUs, collaborating with various teams to ensure design meets functional, timing, and power goals while using innovative optimization techniques.

The Sr. Engineer will work on CPU design, focusing on RTL implementation, collaborating with micro-architects, and optimizing performance, power, and area.

As a Senior Engineer, develop low-level firmware for Ethernet components, drive silicon bring-up, and optimize networking hardware. Collaborate closely with silicon architects and debug hardware-software interactions.

Lead as a hybrid Chief of Staff and execution-focused TPM for the RISC-V software org: define goals, plan and track execution, manage dependencies and risks, drive cross-functional initiatives, support headcount and recruiting, prepare leadership materials, and represent the team to partners and customers.