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Reposted 7 Days AgoSaved
In-Office
5 Locations
100K-500K Annually
Entry level
100K-500K Annually
Entry level
Hardware • Manufacturing
Develop and maintain infrastructure platforms for AI services, build APIs, manage Kubernetes clusters, and automate workflows using CI/CD practices.
Top Skills: AnsibleCi/CdGitopsGoKubernetesPython
Reposted 8 Days AgoSaved
In-Office
Austin, TX, USA
100K-500K Annually
Mid level
100K-500K Annually
Mid level
Hardware • Manufacturing
As a Staff Engineer, you will lead the technical efforts in CPU verification, emulation, and debugging, optimizing the emulation infrastructure and workflow for high-performance CPUs, collaborating with teams to ensure fast and effective product development.
Top Skills: Cpu VerificationDebugEmulationSystemverilogVerilogZebu Emulation Platforms
Reposted 9 Days AgoSaved
In-Office or Remote
6 Locations
100K-500K Annually
Senior level
100K-500K Annually
Senior level
Hardware • Manufacturing
As Director, Systems & Solutions, lead the deployment and optimization of AI compute systems, focusing on hardware technologies and customer engagement to enhance performance and usability.
Top Skills: Ai AcceleratorsCpuDriversFirmwareFpgaGpuLinuxRisc-V
Reposted 10 Days AgoSaved
Remote
United States
100K-500K Annually
Senior level
100K-500K Annually
Senior level
Hardware • Manufacturing
As an AI Performance Simulation Architect, you will architect and develop scalable cycle-accurate models for AI workloads and guide hardware design optimization.
Top Skills: C++CudaGem5MpiOpenclOpenmpSst
Reposted 11 Days AgoSaved
In-Office
2 Locations
100K-500K Annually
Entry level
100K-500K Annually
Entry level
Hardware • Manufacturing
As a Staff Design for Test STA Engineer, you will lead the definition and implementation of DFT methodologies and ensure timing closure for AI processors, collaborating with multiple teams to achieve first-pass silicon success.
Top Skills: Cadence TempusDft ArchitectureRisc-VStatic Timing AnalysisSynopsys PrimetimeSystemverilogVerilog
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Reposted 11 Days AgoSaved
Remote
United States
100K-500K Annually
Senior level
100K-500K Annually
Senior level
Hardware • Manufacturing
The Senior Tax Manager leads Tenstorrent's tax function, managing compliance, audits, tax filings, and strategic tax planning while enhancing financial processes.
Top Skills: Ai TechnologyAsc 740Income Tax Compliance
Reposted 13 Days AgoSaved
In-Office
2 Locations
100K-500K Annually
Entry level
100K-500K Annually
Entry level
Hardware • Manufacturing
The role involves advancing ASIC design methodologies, improving design quality and productivity through automation, and collaborating across teams to ensure efficient and scalable design flows.
Top Skills: Asic DesignEda ToolsLow Power Design SpecificationsRtl DesignStatic And Dynamic Analysis ToolsSynthesis Timing Constraints
Reposted 13 Days AgoSaved
In-Office
Austin, TX, USA
100K-500K Annually
Senior level
100K-500K Annually
Senior level
Hardware • Manufacturing
Define and implement CPU system RTL, integrate multiple cores/clusters and subsystem components, and drive functional, timing, and power convergence. Collaborate with DV, PD, architecture, performance, validation and test teams to optimize power/performance/area, debug RTL across hierarchies and support pre- and post-silicon execution while improving RTL flows and tools.
Top Skills: Design Verification (Dv)Post-SiliconPower AnalysisPre-SiliconRisc-VRtlSimulationSynthesisTestValidationVerilogVhdl
Reposted 14 Days AgoSaved
In-Office
Austin, TX, USA
Senior level
Senior level
Hardware • Manufacturing
The engineer will join a CPU design team focusing on performance analysis, verification, and collaboration with architects to deliver efficient CPU designs using RISC-V ISA.
Top Skills: C++PythonRisc-V
15 Days AgoSaved
In-Office
3 Locations
100K-500K Annually
Entry level
100K-500K Annually
Entry level
Hardware • Manufacturing
Physical Design Engineers at Tenstorrent are responsible for implementing high-performance AI SoC designs, overseeing the complete implementation flow from synthesis to tapeout and collaborating with cross-functional teams to ensure all design aspects are met.
Top Skills: DrcEmFusion CompilerHdlIc Compiler IiIrLecLvsMixed-Signal MacrosSynopsys Design CompilerUpf
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