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Lead electrical characterization and test development for semiconductor and quantum devices. Design and execute DC/RF/pulsed/transient measurements, reliability tests, and cryogenic experiments. Develop automated test programs, operate probe and RF/cryogenic test systems, analyze large datasets, correlate results with process/materials, and document methodologies to support device validation and yield improvement.

Develop and optimize semiconductor process modules (deposition, etch, epitaxy) and materials systems for topological qubits. Design DOE experiments, characterize films, analyze data to identify defect mechanisms, create process recipes for cryogenic/low-noise device performance, support BEOL integration and yield improvement, and document scale-up results.

The role involves leading Silicon Photonics I/O development, collaborating on solutions, and driving technology cost reduction in a semiconductor environment.

Lead end-to-end semiconductor integration for scalable topological qubit platforms. Define integration architectures, drive materials and device development (III‑V, superconductors, epitaxy), BEOL and 3D packaging integration, manage yield and reliability, set milestones and metrics, and lead cross-functional teams to deliver manufacturable quantum hardware.

The M&A Lead Integration Architect will strategize and implement integration plans for acquired entities, collaborating with various teams to ensure seamless transitions and alignment with business goals.

The Wet Cleans Engineer develops processes for wet cleaning operations, optimizes performance, trains technicians, and collaborates with various teams for effective manufacturing.

Responsible for managing equipment engineering processes, troubleshooting lithography tools, training technicians, and driving continuous improvement in semiconductor manufacturing.

Manage execution of FinFET semiconductor development programs: own schedules, resources, and milestones; lead cross-functional teams to transition technology into high-volume production; coordinate with Product Management, PDK, Modeling, and IP; communicate with technical and executive stakeholders and customers.

The role involves developing process formulations, ensuring quality standards, conducting experiments on semiconductor processes, and collaborating with cross-functional teams to improve process performance.

The Director manages M&A accounting to ensure compliance with U.S. GAAP/IFRS, coordinates with stakeholders, and leads accounting training initiatives.