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Reposted 5 Days AgoSaved
Hybrid
3 Locations
7-100 Annually
Senior level
7-100 Annually
Senior level
Hardware • Software
Develop and implement digital subsystems for mixed-signal ICs, supporting integration and verification while collaborating with cross-functional teams to ensure manufacturable designs.
Top Skills: DspMatlabSimulinkVerilog
Reposted 5 Days AgoSaved
Hybrid
3 Locations
Junior
Junior
Hardware • Software
As a Digital Design Engineer, you will design and implement digital subsystems for mixed-signal ICs, develop RTL designs, and perform verification and post-silicon validation.
Top Skills: CmosDspMatlabSimulinkVerilog
Reposted 5 Days AgoSaved
Hybrid
3 Locations
Senior level
Senior level
Hardware • Software
Responsible for end-to-end functional verification of mixed-signal ASICs, developing verification plans, testbenches, coverage analysis, and collaborating with cross-functional teams.
Top Skills: HvlSystemverilogUvmVerilogVhdl
Reposted 5 Days AgoSaved
Hybrid
3 Locations
Senior level
Senior level
Hardware • Software
Design and develop analog and mixed-signal ICs including data converters and amplifiers, manage full IC lifecycle, collaborate with teams, and conduct validation.
Top Skills: CmosMatlabSimulinkSpectreSystemverilogVerilog-A
Reposted 5 Days AgoSaved
Hybrid
3 Locations
60K-150K Annually
Senior level
60K-150K Annually
Senior level
Hardware • Software
Design and develop analog and mixed-signal IC blocks while participating in the entire IC lifecycle, collaborating across teams, and ensuring manufacturability and performance optimization.
Top Skills: CmosMatlabSimulinkSpectreSystemverilogVerilog-A
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Reposted 5 Days AgoSaved
Hybrid
3 Locations
5-1000M Annually
Senior level
5-1000M Annually
Senior level
Hardware • Software
The Design Verification Engineer will conduct end-to-end functional verification of custom mixed-signal ASICs, develop testbenches, and collaborate across teams to enhance verification processes.
Top Skills: AvmOvmSystemverilogUvmVeraVerilogVhdl
Reposted 5 Days AgoSaved
Hybrid
3 Locations
Junior
Junior
Hardware • Software
Design and develop analog and mixed-signal ICs for consumer applications, involving full lifecycle from concept to production, using various design and simulation tools.
Top Skills: CmosMatlabSimulinkSpectreSystemverilogVerilog-A
Reposted 5 Days AgoSaved
Hybrid
3 Locations
35K-160K Annually
Senior level
35K-160K Annually
Senior level
Hardware • Software
Design and implement digital subsystems for mixed-signal integrated circuits, collaborate with cross-functional teams, and lead verification processes.
Top Skills: Cmos VlsiDspMatlabSimulinkVerilog
Reposted 5 Days AgoSaved
Hybrid
3 Locations
Senior level
Senior level
Hardware • Software
The role involves functional verification of ASIC designs, including developing verification plans, testbenches, and collaborating with cross-functional teams to ensure high-quality outcomes.
Top Skills: Mixed-Signal IcsSystemverilogUvmVerilogVhdl
Reposted 5 Days AgoSaved
Hybrid
3 Locations
Junior
Junior
Hardware • Software
The Design Verification Engineer will develop verification plans, perform ASIC functional verification, design UVM testbenches, and collaborate with cross-functional teams to improve verification processes.
Top Skills: AvmOvmSystemverilogUvmVeraVerilogVhdl
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