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The Software Engineer Intern will develop and validate brain-computer interface software, collaborate with users, and implement new features.

Own EMC compliance strategy, testing, debugging, and documentation for implantable electronics, surgical robots, wireless charging systems, and manufacturing equipment. The role develops test capabilities, leads pre-compliance and formal testing, investigates failures, defines design mitigations, manages ESD controls, and partners with engineering, quality, regulatory teams, and certification laboratories. Responsibilities also include maintaining protocols, reports, risk assessments, traceability, and regulatory submission data while promoting EMC-by-design practices.

Source, interview, and manage pipelines for technical, clinical, and other roles. Partner with hiring managers on requisitions, hiring strategies, interview feedback, and candidate evaluation. Develop sourcing and engagement strategies, identify exceptional talent, provide recruiting metrics and insights, drive process improvements, and build strong relationships across Neuralink’s hiring teams and talent networks.

As an Embedded Software Engineer, you will develop firmware for brain-computer interfaces, collaborating cross-functionally on safety-critical embedded systems and delivering manufacturable solutions.

As a Machine Learning Engineer Intern, you'll develop neural decoders for Brain-Computer Interfaces and collaborate with cross-functional teams on new functionalities.

Design and implement micro-architecture and RTL for low-power DSPs and hardware accelerators, optimize hardware/software interfaces, model and profile energy/performance trade-offs, collaborate on silicon bring-up and verification, and develop emulation models and test environments.

The UI Design Engineer will create and refine interfaces for BCI, collaborating with experts and testing to improve usability for users with different sensory experiences.

The Software Engineer Intern will develop safety-critical software for robotic systems, collaborating with various engineering teams to ensure functionality and reliability.

The Digital IC Design Engineer will develop micro-architecture and RTL for low-power processors and hardware accelerators in brain-computer interfaces, collaborating with teams on optimization and testing.

Design and implement analog and mixed-signal ICs from transistor-level circuits through layout and verification. Define verification plans, run complex simulations (power, performance, linearity, yield), and design and execute lab tests. Collaborate across disciplines to achieve strict noise, mismatch, distortion, power, and size targets.