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Seeking talented Design Verification Engineers with expertise in industry-standard protocols such as PCIe and CXL. Responsible for developing and executing verification plans, writing test sequences, and collaborating with RTL designers. Requires knowledge of simulators, regression systems, and a customer-focused attitude.

Seeking a Principal Physical Design Engineer with ≥10 years of experience in supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications. Must have hands-on knowledge of synthesis, place and route, timing, extraction, and other backend tools for technologies 16nm or less. Experience with Cadence and/or Synopsys tools, System Verilog/Verilog, DFT tools, and IP vendors required. Salary based on experience level.

As a Principal DFT (Design for Test) Engineer at Astera Labs, you will be responsible for developing the next generation of connectivity products, supporting cloud service providers and OEMs. You will be involved in the full product life cycle and collaborate with various engineering teams. Ideal candidates should have extensive experience in semiconductor companies and hands-on expertise with DFT techniques and tools.

Seeking a Principal Design Verification Engineer with extensive experience in PCIe and CXL protocols to drive functional verification of designs, develop test plans, write test sequences, and collaborate with RTL designers.

Design, implement, and test production-grade diagnostics and manufacturing tests for high-speed digital boards and ASICS. Responsibilities include hardware validation, manufacturing automation, system debugging, and supporting new platform software and hardware features. The role also involves participating in design discussions, project management, and mentoring junior team members.

As a Diagnostics Platform Software Engineer at Astera Labs, you will design, implement, and test production-grade diagnostics and manufacturing tests for high-speed digital boards and ASICS. This role involves hardware validation, manufacturing automation, and collaboration with the hardware engineering team. Preferred experience includes working with complex electronic equipment, system debugging, and proficiency in Python.

Design and support Astera Labs' Smart Cable Modules for leading cloud service providers and OEMs. Provide technical guidance to customers, generate collateral, drive innovation, and address semiconductor product challenges.