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The Principal SI/PI Design Engineer will lead electrical package design for photonic and ICs, overseeing layout, optimization, simulations, and collaboration with cross-functional teams.

As a Digital Verification Engineer Expert, you will validate digital products, propose verification strategies, mentor team members, and ensure project timelines are met.

Design and validate system power and grounding and circuit-pack level power solutions for optical and Ethernet platforms. Create schematics and layouts, work with mechanical and supplier partners, verify prototypes with lab measurements, lead design reviews, mentor engineers, manage projects, and drive production handoff for power subsystems.

The Data Management Lead defines data strategy and architecture for telecom data, aligning it with AI and automation, while driving product innovation and implementing scalable solutions.

The Advisor, Portfolio Marketing drives global initiatives for high-speed interconnects, creating differentiated portfolio positioning, marketing content, and ensuring alignment with sales and development teams.

Lead enterprise Anaplan architecture, define modeling and ALM standards, design integrations (Snowflake, Power BI, ERP/CRM/HR), ensure SOX/compliance, guide model builders, and drive platform roadmap, performance, and governance across FP&A, IT, and business stakeholders.

Lead end-to-end design, validation, and troubleshooting of high-layer-count PCB circuit packs for high-speed networking. Collaborate with cross-functional teams, perform schematic capture and signal-integrity assessments, guide PCB layout and fabrication, validate designs against requirements, support production and customers, author documentation, drive process improvements, and mentor junior engineers.

The Global Process Owner for S&OP leads the design and continuous improvement of the S&OP process, ensures collaboration across functions, and drives digital transformation and automation within the organization.

Lead design and delivery of high-speed analog circuits in deep-submicron CMOS/BiCMOS for coherent optical systems, including optical-line ADCs, precision control/monitoring circuits, multi-phase clock generation, topology trade-offs, GDSII delivery, and lab characterization from test chips to full products.

As a Senior Analog Layout Engineer, you will design high-speed analog layouts, conduct verification checks, collaborate with team members, and enhance layout productivity.