Top Tech Jobs & Startup Jobs

Lead development of memory system architecture and micro-architecture for SoCs. Build and maintain performance models and simulations, analyze benchmarks and workloads, identify micro-architectural tradeoffs, and debug performance and functional issues across high-level models, RTL simulation, and silicon.

Define and own system-management architecture and lifecycle flows for AI factory platforms. Specify and guide implementation of management protocols, hardware-software interactions, and interface topologies. Architect communication pathways (PCIe, I2C/I3C, USB, SPI), coordinate cross-functional teams, and author technical specifications, test plans, and factory provisioning/recovery procedures to ensure secure, reliable production and deployment of data-center platforms.

Design, architect and validate high-frequency, low-power GPU clock RTL. Collaborate with frontend/backend, drive RTL/netlist quality, provide clock data to SoC verification/timing/DFT teams, use Perl/Python to automate flows, and debug GPU clock silicon issues with software and silicon solutions teams.

Lead architecture and development of next-generation scale-up fabrics and collaborative communication for AI data-centers. Ensure scalability, reliability, and robust large-model training across hardware, software, and applications while driving innovation and cross-functional implementation toward production and manufacturing.

Design and verify high-performance Switch silicon blocks: develop RTL and reference models, run simulations and synthesis, perform timing analysis, support verification and post-silicon activities, and collaborate across architecture, micro-architecture, backend, and firmware teams.

Verify SoC/GPU designs using advanced verification methodologies. Define verification scope and infrastructure for memory subsystems, develop reusable verification components, collaborate with architects, designers, and software engineers, and debug complex issues.

Design and architect on-chip GPU/CPU clock domains, collaborate with front-end, physical design, timing, verification and SW teams to implement clock RTL, optimize PPA, support ASIC implementation through sign-off and silicon bring-up.

Drive end-to-end quality in AI microservices, lead testing strategies, mentor engineers, and enhance automation practices while validating AI inference workflows.

Lead performance practices for large-scale AI systems, enhance datacenter products, and resolve complex performance issues through collaboration and technical expertise.

Optimize GPU kernel performance for deep-learning workloads by profiling, debugging, and implementing optimizations. Build Python-based automation and regression infrastructure, design large-scale performance test workflows, and collaborate with kernel, compiler, architecture, and infrastructure teams to ensure reproducible performance and CI-driven regression prevention.