Top Tech Jobs & Startup Jobs

Design, develop, and deliver ultra-high-performance electronic products with end-to-end ownership (one-person/one-board). Duties include BOM creation, vendor negotiations, circuit/PCB design, validation, and sustaining support (customer trials and field issues). Collaborate cross-functionally with ASIC, signal, mechanical, thermal, packaging, diagnostic, and manufacturing teams. Address power/thermal challenges for 1kW+ PCBs and high-speed SerDes signaling (112G+). Provide technical leadership to small design teams.

Develop and validate ATE test programs and flows on Advantest/Teradyne platforms. Diagnose failures, create characterization tests, support qualification and R&D test methodology, analyze electrical/thermal root causes, and present results to cross-functional teams.

Design and develop mechanical assemblies for high-performance electronic products, ensuring compliance with safety regulations and product lifecycle ownership.

Responsible for front end design and verification of ASIC design blocks, including architecture definition, logic design, synthesis, and verification through simulation and analysis of timing.

The Epitaxy Fab Assistant performs functions related to Epi wafers, operating reactors and supporting tools, and calibrating process equipment in a fab environment.

Develops and deploys semiconductor timing sign-off flows using Python, Perl, Tcl, and Unix shell. Responsibilities include EDA flow development for PrimeTime, Tempus, Innovus, and RedHawk; automation; statistical data analysis and modeling; and support for chip design teams. The role requires advanced digital IC design expertise, strong communication, multitasking, problem-solving, and collaboration across projects.

Develop and deploy advanced timing sign-off methodologies for SOC, 3D/2.5D IC, and multi-die designs. Lead EDA flow development using Primetime, Tempus, and Innovus, while applying statistical analysis, silicon technology, testability, and yield expertise. The role requires extensive tapeout and timing sign-off experience, scripting and automation skills, cross-functional collaboration, and autonomous problem solving in a fast-paced engineering environment.

Design and verify mixed-signal circuits, IO interfaces, analog blocks, and digital wrappers in advanced CMOS technologies. Collaborate with layout and test engineers on physical design, characterization, silicon validation, and test-chip infrastructure. Interface with customers to define requirements and specifications, support ATE and bench testing, and produce datasheets, application notes, and integration guides.

Design and develop memory and circuit blocks at gate or transistor level for AI foundation IP. Responsibilities include circuit simulation, layout extraction, post-layout verification, physical implementation, characterization flow integration, automation scripting, memory model verification, documentation, and silicon test correlation. The role requires expertise in transistor-level behavior, device physics, signal integrity, EM/IR, reliability analysis, simulation tools, and memory circuit design, with DFT and chip integration knowledge preferred.

Design and verify mixed-signal circuits and IO interfaces, including sensors, oscillators, PLLs, LDOs, ADCs, and DACs. Develop RTL wrappers, functional models, timing characterization, test infrastructure, and silicon validation support. Collaborate with layout and test engineers, interface with customers to define requirements, and produce technical documentation such as datasheets, application notes, and integration guides.