Top Tech Jobs & Startup Jobs

Develop, validate, maintain, and debug platform-level power, thermal, performance, and telemetry software for Intel server products. Create and run stress workloads, analyze telemetry, optimize register settings and software data paths, and collaborate with hardware, platform validation, and customer teams to resolve power and thermal issues across Xeon data center platforms.

Perform end-to-end CPU physical design from RTL to GDS: synthesis, place-and-route, CTS, floorplanning, STA, power/noise and reliability analysis, verification/signoff (DRC/LVS, formal), and collaborate with architecture, circuit, and EDA teams to optimize power, frequency, and area.

Design and implement CPU core blocks from synthesis through post-layout verification and tapeout. Perform logic synthesis, floorplanning, APR, timing closure, low-power optimizations, noise/OCV analysis, physical verification, and scripting for data analysis and flow recipes while collaborating with micro-architecture, RTL, and circuit teams.

The role involves leading wet etch and cleans development, focusing on advanced logic process integration and mentoring engineers.

Develop and execute verification testbenches and RTL models for Power Management Controller IP. Define test plans, create tests and tools, debug RTL and platform issues, collaborate across teams and partners, and validate new architectural features using simulation and firmware co-validation environments.

Develop and optimize RF and analog test solutions from feasibility through production. Design test boards, perform ATE and bench characterization, debug functionality and performance, correlate ATE-to-DV, tune thermal and power recipes, and develop software to drive advanced test equipment to ensure product quality and yield.

Design and implement CPU core blocks from synthesis through post-layout verification and tapeout. Develop constraints for synthesis and APR, perform floorplanning/routing studies, block-level timing analysis, low-power optimization, physical verification closure, and write scripts for data analysis and tool recipes while collaborating with RTL, micro-architecture, and circuit teams.

Design and implement mixed-signal IP logic: RTL coding, simulation, and optimization to meet power, performance, area, and timing goals. Collaborate with analog, digital, and physical teams, review and fix RTL verification issues, and support SoC customers for high-quality IP integration.

Design and implement advanced DFT/DFD methodologies for complex SoC designs, integrate and verify DFT features in RTL, collaborate across design, verification, and post-silicon teams to debug and validate, and adopt AI-driven workflow improvements to optimize testability and post-silicon efficiency.

Design and optimize CPU logic and RTL, write and simulate RTL for CPU IP blocks, meet PPA and timing goals, ensure physical design integrity, review verification plans, document microarchitectural specs, and collaborate with SoC customers for integration.