Top Tech Jobs & Startup Jobs

Customer-facing pre-sales engineer supporting public-sector accounts in West Japan. Define technical requirements, design Cisco-based solutions, lead PoCs and demos, present solutions, coordinate with sales, BU, services and partners, and support implementation and competitive analysis.

Lead architecture, design, layout, measurement and productization of ultra-deep sub-micron CMOS high-speed analog/mixed-signal ICs. Own large chip blocks, mentor engineers, track deliverables, perform peer reviews, and collaborate with packaging/hardware teams to meet signal and power integrity. Develop high-speed AMS circuits and drive designs from conception to production.

Lead architecture, design, layout, simulation, measurement and productization of high-speed (>25Gb/s) mixed-signal CMOS ASIC blocks for optical transceivers. Mentor team members, manage deliverables, perform peer reviews, and collaborate with digital/DSP, packaging, and hardware teams to meet signal and power integrity and manufacturability requirements.

Drive cost-optimized electronic circuit design and manufacturability across NPI lifecycle. Lead defect reduction, component qualification, and CM capability assessments. Implement DFM/DFR/DFQ practices, produce technical documentation for mass production, and support product lifecycle and sustaining engineering improvements.

Join Cisco Webex Media in Stockholm to build real-time media features, write performant C/C++ code, participate in agile development, perform peer reviews, automate workflows, and collaborate across teams to grow technical and soft skills.

Design, develop and optimize C++ software components (firmware, SDKs, simulators, compilers) for Cisco Silicon One. Collaborate with software and hardware/ASIC teams globally, identify and fix bugs, perform SW/HW integration, maintain code quality, and automate build/maintenance tasks.

Develop and optimize CAD methodologies and flows for ASIC physical design from RTL to GDS. Work on physical synthesis, place-and-route, timing closure, floorplanning, and verification. Integrate and validate PD EDA tools, support technology adoption, and improve backend processes to deliver high-quality VLSI designs.

Lead and review micro-architecture and verification plans, supervise verification engineers, implement UVM-based environments, collaborate with design and firmware teams to debug, close coverage, and perform post-silicon validation and root-cause analysis in the lab.

Lead end-to-end physical implementation of complex ASIC blocks from RTL to tape-out. Drive synthesis, place-and-route, and timing closure to meet PPA goals, collaborate with frontend/IP/CAD teams, advance physical design methodologies, and provide technical direction and mentorship to deliver production-ready silicon.

Lead design, develop, and maintain the Device Automation/ServiceNow platform. Collaborate with cross-functional teams to translate requirements, build integrations, run system testing, monitor platform health, create scripts/workflows, troubleshoot issues, and provide end-user training and support.