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Define and evolve ASIC development methodology and design flow; lead evaluation, deployment and optimization of EDA tools and automation; develop, validate and optimize tools and scripts; provide expert support to teams and vendors; mentor engineers and contribute to roadmap, planning and technology scouting.

Provide and maintain large-scale emulation platforms for pre-silicon CPU development: configure emulators, support RTL adaptation, verification, build emulation models, automate workflows, debug performance, interact with EDA vendors, and support users.

Develop, test, integrate and validate Linux kernel features for SiPearl Rhea processors. Define kernel specs and testing plans, contribute fixes to mainstream distributions, maintain Yocto layers, collaborate with partners, investigate critical issues, and mentor trainees while supporting CI/version-control workflows and open-source contributions.

Define and drive IP, subsystem and SoC architectures; decompose architectures into functional blocks and specs; select commercial IP and process technologies; define software/configuration interfaces; support RTL, physical design, verification and prototyping teams; review microarchitecture and validation plans; liaise with product/marketing and external partners; lead work packages, coordinate deliverables, and mentor junior engineers.

Lead and coordinate semiconductor platform development from concept to product launch across hardware and software. Define work packages, plan phases, manage subcontractors, align stakeholders, implement project methodologies, and report escalations and corrective actions to management.

Build and improve multi-FPGA prototyping platforms from RTL to hardware, port and model complex designs, develop hardware/software blocks and automation, debug performance and timing, support internal teams, coordinate with EDA vendors and IP providers, and share best practices across the company.

SiPearl invites unsolicited applications for roles supporting development of Rhea, a European high-performance, low-power microprocessor for supercomputing and AI. Candidates can submit profiles for consideration to join a fast-growing, multi-site European team collaborating with the EPI consortium to advance HPC infrastructure.

Develop and enhance compiler features, libraries, and toolchains for SiPearl CPUs; diagnose and generalize software issues; contribute to collaborative projects, testing, validation and delivery; monitor software quality and mentor interns.

Develop, run and analyse benchmarks and application codes on Cloud and HPC to evaluate SiPearl processors (pre-silicon, simulation and silicon). Design tests, collect/validate performance data, propose optimisations, fix software issues, package and present results, and contribute to collaborative R&D projects.

Define and drive system architecture for SiPearl HPC systems, lead partner engagements, develop integration and benchmarking tools, support customer migrations, debug integration issues, mentor interns, and contribute to collaborative projects and technical deliverables.