Top Tech Jobs & Startup Jobs

Lead architecture and integration of RISC-V-based compute clusters and vector engines for AI acceleration. Define ISA extensions, interconnects, memory hierarchies, scheduling, and cache utilization; collaborate with compiler, ML runtime, RTL, verification, and firmware teams; evaluate performance/power trade-offs; and specify debug, trace, and performance-monitoring features to deliver scalable, power-efficient AI SoC compute subsystems.

Design and implement high-performance kernels for AI primitives (GEMM, attention, normalization, convolution). Optimize throughput, latency, and memory hierarchy across heterogeneous compute units. Integrate kernels with Triton/PyTorch/SYCL, profile and tune with Perfetto/VTune/Tracy, prototype precision formats and stochastic rounding, and contribute micro-architecture feedback. Write reusable C++/CUDA/Triton/LLVM MLIR code.

Lead architecture and integration of RISC-V-based AI compute clusters and vector engines. Define ISA extensions, memory subsystems, interconnects, task-mapping and scheduling, and performance/debug features. Collaborate with compiler, ML runtime, RTL, verification, and firmware teams to optimize performance-per-watt and scalability across silicon generations.

Perform chip-level and performance verification of custom ASICs. Design end-to-end test flows and methodologies with architects to verify real-world performance. Use simulation tools and UVM environments, implement constrained-random and coverage-driven tests, and collaborate across teams and vendors to validate silicon.

Build and operate developer infrastructure: CI/CD pipelines, dev environments, containerized builds, and internal deployments. Improve build/test speed, observability, and production-representative dev systems while partnering with compiler, runtime, kernel, and hardware teams.

Design and validate modular electromechanical chassis and rack-level systems for data centers (HPC/AI/Enterprise). Own product lifecycle through high-volume manufacturing, perform thermal/structural/vibration analysis using FEA, specify metal fabrication and liquid/power connector integration, and align across silicon, power, and optical teams.

Lead architecture and integration of the SoC management subsystem: ARM core integration, PCIe and memory interfaces, peripherals, debug/trace, control paths, and cross-team co-design to meet performance, power, and area targets.

Design, develop, and optimize embedded software for AI-enabled devices. Integrate AI algorithms with hardware, improve system performance, validate and test AI features, document designs, maintain version control, and support deployment and troubleshooting of embedded AI systems.

Lead strategy and execution for silicon, IP, and system partnerships. Cultivate vendor relationships, manage RFQs, negotiate complex technology and sourcing deals, establish supply chain agreements, and align partnerships with engineering and product priorities while interfacing with founders and leadership.

Design, develop, and optimize core components of an AI-driven software stack. Implement API layers, command pipelines, and memory management; collaborate with hardware and kernel teams; debug across user-to-hardware layers; and optimize for performance and throughput.