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Develops FPGA logic architecture, RTL designs, simulations, IP blocks, and subsystems using Verilog and VHDL. Defines microarchitecture, creates prototypes and software models, and optimizes designs for power, performance, and area. Partners with physical implementation and verification teams to validate features, resolve RTL test failures, and support device bring-up. Requires extensive FPGA, ASIC, or custom IC design experience and strong analytical and collaboration skills.

Own and scale Workday integrations, reporting, data governance, and workforce analytics. Serve as the Workday subject matter expert, translating business needs into reliable system solutions while partnering with HR, Payroll, IT, Finance, and vendors. Ensure data integrity, operational effectiveness, and actionable workforce insights. Lead integration and reporting strategy, support Workday security and reporting capabilities, and potentially guide teams or technical project delivery.

Provides technical guidance and customer support for Altera FPGA transceiver and protocol IP solutions throughout architecture, implementation, hardware bring-up, validation, and production. Responsibilities include reviewing designs, debugging RTL and hardware issues, reproducing cases with FPGA and lab tools, coordinating defect resolution, developing scripts and reference designs, delivering training, and contributing to product readiness and documentation. The role requires expertise in high-speed serial interfaces, transceiver PHYs, FPGA design flows, protocols, and hardware troubleshooting.

Own end-to-end backend IC design automation flow bring-up for new semiconductor process nodes, including PDK, standard-cell library, Foundation IP, EDA tool, script, and infrastructure integration. Develop regression tests, qualify and deploy production flows, support design teams through tape-out, and provide debugging, training, documentation, and methodology improvements. Collaborate across global engineering teams and apply AI/ML to regression analysis, flow optimization, and knowledge capture.

Leads global equity administration and supports compensation program design, governance, accounting, reporting, controls, and employee experience. Partners with Finance, HR, Legal, Payroll, Tax, executives, and external providers on equity transactions, grants, vesting, ESPPs, executive compensation, valuations, disclosures, tax requirements, and SOX-ready processes. Builds the equity administration team, manages platforms and data integrity, develops analytics, and provides participant education.

Develop and validate FPGA Soft IP throughout the RTL lifecycle, including micro-architecture, RTL coding, synthesis, place-and-route, timing closure, simulation, verification, hardware bring-up, and lab debugging. Collaborate with embedded software, hardware, and systems teams on specifications, interfaces, and system integration. Automate FPGA tool workflows and resolve clock-domain-crossing, timing, and constraint issues.

Design complex analog and mixed-signal IC layouts, including floorplans, power grids, ESD structures, bumps, shielding, and device matching. Run DRC, LVS, ANT, ERC, EM/IR, ESD, and other reliability checks. Develop layout methodologies, troubleshoot design and flow issues, and collaborate with circuit, process, and package teams to optimize area, power, reliability, performance, and yield.

Develop and execute verification plans and UVM-based testbenches for FPGA/ASIC IP. Create directed and random tests, assertions, scoreboards, and coverage metrics; run simulations, debug failures, and automate flows with scripting.

Manage end-to-end customer relationships and lead-to-order processes for assigned accounts: forecast demand, execute orders, handle escalations, coordinate NPI/sample requests, maintain CRM data, prepare sales reports, and support cross-functional contract/pricing and onboarding activities to drive customer success.

The Senior/Principal GRC Analyst is responsible for leading governance, risk, and compliance programs, ensuring regulatory compliance, and mentoring junior staff while interacting with various stakeholders.