Analog Layout Design Engineer

Posted One Month Ago
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2 Locations
In-Office or Remote
Entry level
Artificial Intelligence • Internet of Things • Machine Learning
The Role
Design complex analog and mixed-signal IC layouts, including floorplans, power grids, ESD structures, bumps, shielding, and device matching. Run DRC, LVS, ANT, ERC, EM/IR, ESD, and other reliability checks. Develop layout methodologies, troubleshoot design and flow issues, and collaborate with circuit, process, and package teams to optimize area, power, reliability, performance, and yield.
Summary Generated by Built In
Job Details:

Job Description:

We are seeking a skilled and detail-oriented Analog Layout Designer to join our engineering team. In this role, you will be responsible for designing complex layouts of analog signal circuits based on rigorous design specifications. You will execute comprehensive verification flows to ensure top-tier performance, reliability, and manufacturability, while collaborating closely with cross-functional teams to optimize area, power, and yield.

Key Responsibilities
  • Layout & Floorplanning:

    • Design complex layouts of analog signal circuits meeting strict design specifications.

    • Design and analyze floorplans, power grids, ESD protection structures, and bumps for analog blocks.

    • Perform micro-floorplanning and detailed signal planning for complex analog circuits, ensuring proper shielding and device matching for critical signals.

  • Verification & Reliability:

    • Run complete sets of design verification tools to check process design rules (DRC/LVS).

    • Perform critical reliability checks, including electromigration, voltage drop (IR drop), ESD, and other advanced layout-dependent effects.

  • Methodology & Innovation:

    • Develop and drive new, innovative analog layout methodologies to continuously improve layout productivity, efficiency, and quality.

    • Troubleshoot a wide variety of challenges ranging from design anomalies to tool, flow, and methodology issues.

  • Cross-Functional Collaboration:

    • Partner with analog circuit designers, process technology teams, and package design engineers to align on specifications and plan deliverables.

    • Negotiate layout trade-offs effectively to optimize for area, power, reliability, and overall performance.

Qualifications:

Experience: Proven experience in analog and mixed-signal integrated circuit (IC) layout design.

Technical Expertise:

  • Strong proficiency in custom layout tools (e.g., Cadence Virtuoso or equivalent).

  • Deep understanding of physical verification tools (Calibre or equivalent) for DRC, LVS, ANT, and ERC.

  • Expertise in advanced reliability verifications (EM/IR, ESD, thermal effects).

  • Solid knowledge of advanced semiconductor process nodes and related layout techniques (matching, shielding, guard rings, common-centroid layout).

Soft Skills: Excellent problem-solving abilities, strong communication skills, and the ability to thrive in a collaborative, cross-functional team environment.

Job Type: Regular

Shift:Shift 1 (Israel)

Primary Location:Haifa, Israel

Additional Locations:TLV

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Skills Required

  • Proven experience in analog and mixed-signal integrated circuit layout design
  • Strong proficiency with custom layout tools such as Cadence Virtuoso or equivalent
  • Deep understanding of physical verification tools such as Calibre or equivalent
  • Experience with DRC, LVS, ANT, and ERC verification
  • Expertise in EM/IR, ESD, and thermal reliability verification
  • Knowledge of advanced semiconductor process nodes and layout techniques, including matching, shielding, guard rings, and common-centroid layout
  • Excellent problem-solving abilities
  • Strong communication and cross-functional collaboration skills

Altera (altera.com) Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Altera (altera.com) and has not been reviewed or approved by Altera (altera.com).

  • Retirement Support — Feedback suggests retirement programs are robust, with offerings such as a 401(k) and a pension. This breadth supports long-term financial security.
  • Leave & Time Off Breadth — Feedback suggests time-off policies are generous, including PTO, paid sick days, and paid holidays. Wellness initiatives like gym memberships further support balance.
  • Parental & Family Support — Feedback suggests parental leave is generous. Family-building support, including fertility benefits and adoption reimbursement, is highlighted as part of the package.

Altera (altera.com) Insights

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The Company
HQ: San Jose, California
1,612 Employees
Year Founded: 1983

What We Do

Altera: Accelerating Innovators Altera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.

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