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Advise customers and field teams on Altera FPGA solutions from evaluation through production. Resolve complex FPGA design and tool issues, optimize performance and resource utilization, support high-speed interfaces, drive timing closure, and coordinate with engineering teams. The role also supports design wins, customer adoption, system integration, and successful first-pass functionality.

Own and develop production Reliability Verification tools, flows, automation, regressions, and methodology for custom/analog and ASIC designs. Execute EM/IR analyses, triage violations, support tape-outs, enable new process nodes, and drive fixes to sign-off. Provide user support, documentation, training, and vendor engagement while modernizing RV workflows and applying AI/ML and scripting to improve performance.

Performs functional verification of FPGA designs through verification planning, testbench and environment development, simulation, coverage analysis, timing and power analysis, debugging, and root-cause investigation. Collaborates with architects, RTL developers, physical design, systems, and software teams to validate complex features and improve verification methodologies. Documents verification strategies, test plans, technical reviews, and results across pre-silicon environments.

Leads Altera’s AI transformation of hardware design by defining AI/ML strategy, deploying tools across design, verification, and implementation workflows, building data and evaluation foundations, and measuring productivity impact. The role requires deep semiconductor and EDA expertise, hands-on ML/LLM experience, cross-functional influence, vendor evaluation, stakeholder engagement, and mentoring without direct reports.

Lead FPGA RTL design and platform enablement for Altera development kits. Responsibilities include FPGA architecture, Verilog/SystemVerilog implementation, Quartus Prime flows, timing closure, board bring-up, interface validation, simulation, hardware debugging, and technical leadership. The role involves PCIe, Ethernet, memory, transceiver, and peripheral interfaces; collaboration with board, firmware, IP, silicon, and validation teams; and mentoring engineers through cross-functional issue resolution.

Drive product definition and roadmaps for PCIe, CXL, and DMA IP for FPGA devices. Gather and prioritize market and customer requirements, align cross-functional programs, generate product requirements, and coordinate engineering execution and change management to deliver hard and soft IP solutions.

Leads HR business partnering for Altera’s India operations in Bangalore and Hyderabad. Advises senior leaders on workforce planning, organizational design, talent, performance, engagement, employee relations, compliance, and organizational change. Translates global HR programs for India, partners with HR centers of excellence, manages sensitive employee matters, and supports benefits, payroll, compensation, HR systems, and policy implementation. Requires strong knowledge of Indian employment practices and the ability to influence across cultures and functions.

Leads IT service management operations, governance, and continuous improvement across Incident, Problem, Change, Request Fulfillment, and Configuration Management. Manages major incidents, root-cause analysis, CAB meetings, ITSM platform workflows, service metrics, SLA tracking, and managed service providers. Coordinates technical teams and stakeholders to improve availability, service delivery, and mean time to resolution.

Leads FPGA configuration application enablement, product development, hardening, and customer support. Acts as a technical advisor, debugs configuration issues, drives corrective actions, develops and validates FPGA design examples, and creates technical documentation and training materials. The role also supports board bring-up, hardware debugging, FPGA programming solutions, and product improvements for future FPGA technologies.

Develops and executes verification plans for FPGA PCIe IP, subsystem, and system-level designs. Builds testbenches, creates tests and coverage goals, analyzes coverage metrics, debugs failures, and drives bug closure. Collaborates with vendors on verification tools and methodologies, enhances FPGA design verification processes, and applies advanced techniques to improve quality and productivity. Requires strong communication, leadership, and problem-solving skills.