From the IoT to the data center, Altera offers a broad portfolio of programmable logic solutions that allow customers to solve a wide variety of system level challenges.
Be part of the talented PCIe IP design verification team
We are looking for experienced IP design verification engineer
Responsibility includes
Create comprehensive verification plan based on FPGA IP architecture specifications and carry out all the IP verification tasks. Developing IP, subsystem or system level testbench, create tests, and necessary coverage goals based on specification to verify the implementation. Review verification and validation results against the coverage goals. Writing, analysing and achieving coverage metrics with failures debugging as well as bug filling and closure. Interfacing with 3rd party vendors for latest industry tool and methodology or VIP exposure and evaluation Understanding and enhancement of Design Verification processes in the FPGA development flow Apply advanced techniques to achieve verification and validation with the highest quality, productivity, and time to market. Provide practical, innovative solutions to complex problems.
This role requires excellent communication and leadership skills and a proven ability to work with challenging schedules. Join our team of innovators to push the boundaries of what’s possible and move into the future.
Qualifications:MSEE/BSEE or equivalent with 5 years of experience in IP / SoC design verification.
Strong in System Verilog, UVM, Verilog
Strong in coverage-based verification methodology with assertions
Knowledge on PCIe is a must
Familiar with Perl, Python, Java is a plus
Familiarity with Intel Quartus or Xilinx Vivado is a plus.
Strong skills in communication, initiative, promote innovation and teamwork
Highly motivated to learn and adapt to fast changing technologies and environments
Demonstrates fundamental values such as accountability, integrity and a winning mindset
Skills Required
- MSEE, BSEE, or equivalent degree
- Five years of experience in IP or SoC design verification
- Strong SystemVerilog skills
- Strong UVM skills
- Strong Verilog skills
- Experience with coverage-based verification methodology and assertions
- Knowledge of PCIe
- Perl experience
- Python experience
- Java experience
- Familiarity with Intel Quartus or Xilinx Vivado
- Strong communication, initiative, innovation, and teamwork skills
- Ability to learn and adapt to changing technologies and environments
Altera (altera.com) Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Altera (altera.com) and has not been reviewed or approved by Altera (altera.com).
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Retirement Support — Feedback suggests retirement programs are robust, with offerings such as a 401(k) and a pension. This breadth supports long-term financial security.
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Leave & Time Off Breadth — Feedback suggests time-off policies are generous, including PTO, paid sick days, and paid holidays. Wellness initiatives like gym memberships further support balance.
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Parental & Family Support — Feedback suggests parental leave is generous. Family-building support, including fertility benefits and adoption reimbursement, is highlighted as part of the package.
Altera (altera.com) Insights
What We Do
Altera: Accelerating Innovators Altera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.
