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Drive thermal and electrical characterization and system-level validation of FPGA products, develop DFT and manufacturing test flows (ATPG, MBIST, BIST), analyze silicon and test data to close tester-to-system gaps, optimize yield and test time, and collaborate across design, packaging, manufacturing, and reliability teams.

Optimize and transform Workday Recruiting processes globally by assessing workflows, increasing recruiter efficiency, automating tasks, improving interview scheduling, building reporting dashboards, identifying AI/automation opportunities, and partnering with TA, HRIS, and business leaders to implement scalable recruiting solutions.

The role involves functional logic verification of FPGA designs, developing verification plans, executing tests, analyzing designs for power and timing, and collaborating with various teams to enhance verification processes.

Lead the design and architecture of Linux kernel solutions for SoC/FPGA platforms, drive upstream contributions, and mentor junior engineers.

Responsible for verification tasks including creating test cases and test benches using UVM methodology, coordinating with cross-functional teams for full coverage verification.

The engineer conducts FPGA logic verification, develops verification plans and test benches, runs simulations, debugs issues, and improves methodologies to ensure design specifications are met.

Support integration of SERDES IP into silicon, packages and PCBs. Perform channel, signal and power integrity simulations, review package/PCB layouts, debug failing simulations, and collaborate cross-team to meet SI/PI and performance goals.

The role involves verifying design architectures using UVM methodology, creating test cases, and coordinating with cross-functional teams for full coverage verification.

The Senior Staff Verification Engineer collaborates to develop verification strategies, creates test plans, and implements verification environments; ensuring design functionality and robustness through testing and debugging.

The Design Verification Engineer verifies FPGA design functionality, develops test plans, and collaborates with teams to ensure high-quality pre-silicon validation and verification.