Top Tech Jobs & Startup Jobs

Provide technical sales support for Altera FPGAs/CPLDs/SoCs: present demos, propose device/IP solutions, assist with design/debug, collaborate with sales and engineering to win designs and drive revenue.

Lead micro-architecture, RTL design, and verification of Network-on-Chip IP. Define architecture, create prototypes and models, implement RTL to meet power/performance/area targets, and use EDA tools and automation/AI to increase development efficiency. Mentor team members and coordinate with physical implementation and verification teams to deliver high-quality IP.

Drive thermal and electrical characterization and system-level validation of FPGA products, develop DFT and manufacturing test flows (ATPG, MBIST, BIST), analyze silicon and test data to close tester-to-system gaps, optimize yield and test time, and collaborate across design, packaging, manufacturing, and reliability teams.

Optimize and transform Workday Recruiting processes globally by assessing workflows, increasing recruiter efficiency, automating tasks, improving interview scheduling, building reporting dashboards, identifying AI/automation opportunities, and partnering with TA, HRIS, and business leaders to implement scalable recruiting solutions.

Support integration of SERDES IP into silicon, packages and PCBs. Perform channel, signal and power integrity simulations, review package/PCB layouts, debug failing simulations, and collaborate cross-team to meet SI/PI and performance goals.

Develop and optimize FPGA placement algorithms within the compiler toolchain to improve timing, congestion, and resource utilization. Integrate placement capabilities with routing, synthesis, and timing teams, analyze placement quality and bottlenecks, and enhance performance, scalability, and QoR for large designs.

Provide technical leadership for Ethernet IP bring-up, validation, and customer support across 10G–100G speeds. Debug designs, validate protocol compliance (AN/LT, IEEE 1588 PTP), create reference designs and documentation, collaborate with cross-functional teams, and drive root-cause analysis to transition designs from prototype to production.

Optimize and transform Workday Recruiting processes: improve recruiter efficiency, streamline approvals and scheduling, build reporting and dashboards, identify automation/AI opportunities, and partner with TA/HR stakeholders to implement scalable recruiting solutions.

Provide customer-facing technical leadership for Ethernet FPGA IP: lead design bring-up and validation across 10G–800G, debug and optimize performance, validate protocol compliance (AN/LT, IEEE1588 PTP), produce reference designs and documentation, and collaborate with design, validation, product engineering, and sales to resolve issues and improve IP quality.

Perform static timing analysis and timing signoff for FPGA/ASIC designs, debug and resolve timing violations, develop and validate timing constraints, collaborate with RTL/synthesis/physical design teams, and improve STA methodology and automation to optimize performance, power, and area.