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Supports digital design implementation, coding, reviews, debugging, checks, simulations, and technical documentation under senior engineer guidance. Collaborates with verification, physical design, and validation teams throughout project execution. Requires a recent engineering or computer science degree, foundational engineering and testing knowledge, strong problem-solving and documentation skills, and clear English communication. Relevant lab work, coursework, internships, design projects, and familiarity with engineering or verification tools are advantageous.

Supports digital design implementation, logic coding, reviews, debugging, checks, simulations, documentation, and test-result maintenance under senior-engineer guidance. Collaborates with verification, physical design, and validation teams throughout project execution while developing engineering, testing, problem-solving, and communication skills.

Develop digital sub-circuits for complex MCU SoCs using RTL coding, synthesis, timing analysis, formal verification, power analysis, and DFT. Collaborate with analog, mixed-signal, and software teams on interfaces and system performance. Conduct simulation, emulation, post-silicon validation, and debugging while documenting designs and test plans. Contribute to design methodologies, automation, quality targets, and technical discussions.

Supports RTL-to-GDSII physical implementation for complex MCU and SoC designs, including floorplanning, power grids, IO placement, place and route, clock-tree synthesis, physical verification, timing analysis, and IR-drop and electromigration analysis. Maintains TCL, Python, and Perl automation scripts, collaborates with RTL, DFT, and analog teams, and learns industry-standard EDA tools to meet performance, power, and area targets.

Develops and executes verification plans, environments, test benches, test cases, assertions, and coverage models for digital MCU designs. Analyzes simulation results, debugs discrepancies, maintains verification collateral and scripts, and collaborates with design, architecture, and software teams to ensure functional correctness and product quality.

Technical leader responsible for hardware-software co-design of MCU and MPU platforms. Leads low-level firmware, device-driver, HAL, and SDK development across simulation, emulation, silicon bring-up, validation, and production. Defines reusable software architectures, ensures hardware compatibility, drives verification and quality practices, reviews register definitions, maintains backward-compatible interfaces, and mentors engineers. Collaborates across hardware, software, verification, and validation teams in a multi-site environment.

Leads physical design and implementation for high-performance MCU integrated circuits, including floorplanning, power planning, place and route, clock tree synthesis, timing closure, power and signal integrity analysis, and physical verification. Defines design methodologies, ensures tape-out readiness, collaborates with architecture and design teams, evaluates EDA tools, and mentors engineers. Requires extensive advanced-node semiconductor experience and expertise with industry-standard physical design, timing, verification, scripting, and power-analysis tools.

Leads exposure management for restricted and high-security environments, overseeing vulnerability detection, asset coverage, risk-based prioritization, remediation governance, exception tracking, and verification. Operates enterprise security platforms, coordinates remediation across infrastructure and application teams, develops dashboards and metrics, supports audit-ready governance, and communicates risk posture to technical and executive stakeholders. Requires strong cybersecurity leadership, experience in controlled environments, and expertise in vulnerability management, attack-path analysis, automation, and compliance frameworks.

Analyzes security, audit, and incident data to identify anomalies, trends, root causes, compliance gaps, and business risks. The role improves security assurance processes, tools, and methodologies; translates customer and business requirements into security solutions; and advises stakeholders. It partners with security, physical security, risk, business, and operational teams to support audit, compliance, risk management, and business continuity activities.

Provides senior-level operational and analytical support for IT audit and compliance programs, including SOX, information security, sustainability, and AI compliance. Reviews control evidence, evaluates IT general and application controls, tracks findings and remediation, validates compliance data, prepares dashboards and management reports, supports GRC tooling UAT, and coordinates stakeholders globally. The role also maintains documentation, supports training and risk assessments, and improves compliance workflows through standardization and automation.