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Lead development and execution of SoC/IP verification suites using UVM/SystemVerilog and C-based DV. Create tests, run RTL/gate-level/power-aware simulations and emulation, collect coverage, debug design issues, drive DV closure across IPs, improve flows for reuse, and mentor junior engineers while collaborating with design teams for sign-off.

Execute standardized trade compliance activities focused on classification support using playbooks and evidence standards. Prepare and validate classification packages, escalate novel cases to Export Controls authority, maintain documentation for audits, support quality routines, and collaborate with operations and authority teams to ensure consistent execution.

Lead supply chain and industrial engineering for an IC assembly and test factory, managing production planning, order fulfillment, resource allocation, process improvement, SCM system implementations, WIP monitoring, and cross-functional coordination to meet delivery and efficiency targets while developing the team and standardizing processes across sites.

Lead and execute SoC/IP verification: develop UVM-based verification environments, create and run testbenches, perform RTL/gate/power-aware simulations, drive coverage closure, mentor juniors, and collaborate with designers for issue resolution and sign-off.

Lead development and ownership of SoC/IP verification suites using UVM and coverage-driven methodologies. Build and debug RTL/netlist/gate-level/power-aware verification environments, create stimulus and assertions, run regressions, drive DV closure across multiple interfaces and security IPs, and mentor junior engineers while collaborating with design teams toward tape-out sign-off.

Execute standardized trade compliance tasks including classification input preparation, documentation and evidence maintenance, and disciplined escalation of novel cases; support quality routines, collaborate with operations and authority teams, and follow playbooks and decision frameworks for audit-ready recordkeeping.

Define and drive architecture and implementation of TPM-based secure embedded software. Translate requirements and standards into designs, ensure compliance with TPM/TCG and certification schemes, lead development teams, perform design/code reviews, monitor software quality and KPIs, and collaborate with system, SoC, and test architects.

The EMEA Regional SOC Analyst will manage cybersecurity operations, focusing on threat detection, incident response, and risk management in IT and OT environments, while collaborating with various teams to enhance security measures.

Support end-to-end New Product Introduction (NPI) activities: drive product qualification, characterization, validation testing, reliability assessment, manufacturability, yield improvement, and launch readiness while collaborating with R&D, test, quality, manufacturing, and marketing teams.

Develop and implement digital logic designs for SoCs, perform RTL coding, conduct verification activities, and collaborate with teams to meet design goals.