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Responsible for developing and integrating drivers and flow during the pre-silicon stage of the chip, collaborating with design teams and external vendors.

The APAC Foundry Operations Senior Principal Engineer leads projects on process integration at foundries, collaborates with various stakeholders, and oversees process release activities, ensuring alignment with business needs.

The role involves defining product roadmaps, collaborating with teams, preparing technical documentation, and providing support for IO aggregator solutions.

Lead the development of innovative Point of Load (PoL) solutions and system architectures, focusing on power management for automotive applications and AI compute platforms. Collaborate on product definitions, system integration, and provide strategic insights on power technologies while ensuring performance and efficiency targets are met.

Lead DFT strategy and implementation for advanced SoC designs: scan insertion, ATPG, BIST, JTAG, verification, coverage analysis, silicon bring-up support, mentor engineers, and collaborate across design, verification, and test teams to ensure manufacturable, high-coverage test solutions.

Develop and optimize application and system software for advanced AI silicon (NPU runtime). Collaborate cross-functionally to define features, document implementations, and review/test to ensure high-quality delivery and robust debugging.

Design and optimize hardware architecture for AI inference chips, collaborating with software teams to enhance performance and scalability.

The role involves designing high-speed analog circuits, guiding junior designers, and collaborating on AFE interfaces for Ethernet products.

Lead pre-silicon verification of AI/ML blocks, RISC-V processors, and digital IP. Create verification plans, architect and maintain UVM-based testbenches, develop testcases, run RTL/gate/FPGA/emulation regressions, analyze coverage, debug issues, and collaborate with hardware, firmware, software, and system teams.

Lead silicon reliability qualification for new technologies: define and execute qualification plans, review foundry data, run reliability stress tests and analyses, de-risk designs with cross-functional teams, investigate escapes, and ensure traceable documentation and corrective actions.