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The Engineering Program Manager at Marvell will lead various product development efforts in cutting-edge semiconductor solutions. Responsibilities include end-to-end ownership of customer-driven custom solutions, working with cross-functional teams, and managing project performance against plan. The role requires excellent leadership, communication, and problem-solving skills.
Responsible for high-performance hardware/system design of all-optical 400G/800G per lambda coherent DSP reference designs and evaluation platforms. Collaborate with cross-functional teams for evaluation platform requirements, board bring-up, and validation. Develop and execute board validation plans and work with external PCB fabrication and assembly houses.
The Digital Signal Processing ASIC Design Engineer at Marvell is responsible for understanding digital communication systems requirements, engineering signal processing solutions, providing high-level models and source code, running functional verification regressions, writing documentation, and giving engineering presentations.
Perform new device characterization, statistical data analysis, functional testing, and product yield improvement within the Semiconductor industry at Marvell. Bachelor's and Master's degree in Electrical Engineering required with 5-10 years of experience.
Lead the SOC Design or Own a significant section of our Switch design IPs. Drive Power Saving innovation, evaluate 3rd party IP, integrate test features, ensure feature coverage, and support timing analysis. Requires 12+ years of industry experience and a Master's degree in Computer Science or Electrical Engineering. Must have experience in digital design microarchitecture, Verilog/SV, logic synthesis, static timing analysis, and scripting languages like Perl and Python.
Work as a Principal Design Verification Engineer at Marvell, developing architecture for functional verification environments for various SoCs and IPs. Responsibilities include test development, coverage analysis, debugging, tool development, and more.
Lead and contribute to the development of next-generation SSD controllers through RTL coding, synthesis, timing closure, functional verification, and documentation. Opportunity to work on interfaces with host and NAND. Requires engineer's degree with 3 years of experience or master's degree with 1 year. Strong programming skills and communication proficiency are essential.
Develop next-generation SSD controllers by contributing to RTL coding, functional verification, synthesis, timing closure, and power performance analysis. Provide design documentation and support product development for various market segments. Requires 1 year of digital design experience or a Master's degree in electronics or related fields.
Contribute to the development of next-generation SSD controllers by RTL coding, functional verification, synthesis, timing closure, RTL lint checks, and power/performance analysis. Provide design documentation and information to internal customers.
Manage engineering programs from planning to production release, work with cross-functional teams, escalate and resolve problems, monitor project performance, lead communication efforts, and identify risks for mitigation. Bachelor's degree in related field or a Master's/PhD for new graduates.
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