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The Sr. Staff Firmware Engineer will be responsible for designing and developing new firmware features, participating in design reviews, delivering architectural documents, and performing debugging and production firmware development. This role involves collaboration with design and SoC teams and requires strong embedded firmware design skills.

The Principal Silicon Photonics Engineer will be part of a team focusing on the design, verification, and validation of high-speed optical components. Responsibilities include developing optical components for next-generation products, implementing design solutions, and collaborating with cross-functional teams to support design automation and photonics product development.

As a Senior Staff Engineer in Test Development, you will test semiconductor chips for compliance with specifications, collaborate with design teams to ensure testability, and develop innovative testing strategies as needed. You will also manage vendor relationships and oversee ATE load board design processes to ensure optimal performance.

The Staff Engineer, Analog Layout will design high-speed analog circuits for mixed-signal applications, ensuring precision in layout for SoCs, collaborating with circuit designers, and mentoring junior engineers. The role involves physical layout, floor planning, design verification, and working with advanced semiconductor process technologies.

The Staff Verification Engineer will develop and maintain a verification environment using UVM, define verification test plans, verify designs with various parameters, maintain regression, debug test failures, report on verification coverage, and ensure coverage targets are met.

The Senior Staff Systems Application Engineer will support Marvell's Optical DSP products, drive customer issues to resolution, and act as a liaison between customers and engineering teams. The role requires expertise in digital signal processing and system hardware to assist customers in integrating products.

The Principal Digital Design Engineer will be responsible for designing critical digital blocks, coding high-quality RTL, and collaborating with various teams to optimize performance. The role involves resolving timings, validating silicon, and leading investigation into design bugs, focusing on innovations for cloud and AI sectors.