Top Tech Jobs & Startups Jobs

Seeking an experienced Sr. Manager, Customer Portfolio Manager to act as focal point for strategic customers, drive deliverables, mitigate risks, and ensure best-in-class product delivery. Requires exceptional leadership, communication, and problem-solving skills. Key attributes include honesty, fearlessness, and judgment. Expected base pay range is $118,460 - $177,400 per annum.

ASIC design engineer responsible for post-RTL design flow, including synthesis, timing closure, DFT generation, and ECOs. Collaborates with Analog/Digital design teams to deliver competitive SerDes IP solutions. Must have a Master’s degree or PhD in EE, CS or related fields and 3+ years of experience.

The Sr. Staff Engineer in Digital IC Design at Marvell is responsible for designing and verifying digital circuits in high-speed data communication ICs. They will collaborate with various teams to deliver competitive solutions, improve design methodology, and provide post-silicon support.

Staff Analog Custom Layout Engineer responsible for designing and optimizing analog mixed-signal layouts, working closely with circuit designers, maintaining detailed documentation, and mentoring junior engineers. Requires proficiency in CAD tools and experience with layout methodologies.

Design Verification Principal Engineer role at Marvell involving verification of highly complex SoCs and multi SoC systems, developing verification environments, test plans, and tools, and collaborating with designers to ensure coverage goals are met.

Design highly optimized and industry-leading circuit solutions for high-speed SerDes in state-of-the-art process nodes. Collaborate with a global team of designers to build best-in-class serial link circuits for various applications.

As a Senior Staff Test Engineer at Marvell, you will be responsible for test program development on the Advantest 93K or Teradyne UltraFLEXplus tester platform, as well as design tester hardware for high-speed testing. You will work on advanced technologies in silicon process and SoC Processors, collaborating with various engineering teams to design, develop, and debug products and solutions.