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Reposted 20 Days AgoSaved
In-Office
San Diego, CA, USA
145K-215K Annually
Senior level
145K-215K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
Lead and build a team of engineers in SoC design, develop methodologies, manage schedules, and engage in technical mentoring, focusing on advanced silicon solutions.
Top Skills: Embedded CoresNetworking BandwidthRtlSemiconductor DesignVerification
Reposted 20 Days AgoSaved
In-Office
Madrid, Comunidad de Madrid, ESP
11-16 Hourly
Internship
11-16 Hourly
Internship
Artificial Intelligence • Automotive • Semiconductor
Develop functional System-on-Chip (SoC) simulation models, write embedded software to test and validate models, improve test automation and scripting, debug and refine models and test cases with the engineering team, and document work for knowledge sharing.
Top Skills: ArmCC++Embedded SystemsGem5PythonQemuSimicsSystemc
Reposted 20 Days AgoSaved
In-Office
San Diego, CA, USA
197K-292K Annually
Senior level
197K-292K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The Director of SoC Design will lead a team in developing strategies for SoC design, manage project execution, and mentor staff while aligning with market demands and budgets.
Top Skills: AIDesign VerificationEmbedded SystemsNetworking BandwidthRtlSemiconductor DesignSocXpu
Reposted 20 Days AgoSaved
In-Office
Toronto, ON, CAN
119K-158K Annually
Senior level
119K-158K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The Senior Staff Digital Design Engineer will design and integrate high-performance wireline PHY IPs, focusing on digital design, RTL implementation, and collaboration with mixed-signal teams to deliver robust SerDes solutions.
Top Skills: SystemverilogVerilog
Reposted 20 Days AgoSaved
In-Office
Petah Tikva, ISR
3-8 Annually
Mid level
3-8 Annually
Mid level
Artificial Intelligence • Automotive • Semiconductor
The role involves leading digital block design from architecture to implementation, optimizing performance, and collaborating with verification engineers for alignment between design and verification goals.
Top Skills: CdcDesign ToolsLintingPower OptimizationRdcRtlStaSynthesisSystemverilogUvmVerilog
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Reposted 20 Days AgoSaved
In-Office
San Diego, CA, USA
184K-273K Annually
Senior level
184K-273K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The role involves developing verification environments, test plans, and tools for SoCs, collaborating with teams, and debugging failures.
Top Skills: C/C++System VerilogUvm
Reposted 20 Days AgoSaved
In-Office
4 Locations
137K-205K Annually
Senior level
137K-205K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
Lead NPI for silicon photonics and co-packaged optical transceivers, driving manufacturing readiness, DfM, yield improvement, characterization, PFMEA, and volume production transfers while partnering with global cross-functional teams.
Top Skills: Co-Packaged OpticsDetectorsJmp (Jsl)LasersModulatorsPythonSilicon PhotonicsSQL
Reposted 20 Days AgoSaved
In-Office
San Diego, CA, USA
172K-254K Annually
Senior level
172K-254K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
Manage and build a design team for SoC and complex sub-systems, develop methodologies for semiconductor processes, and provide technical mentoring while overseeing project timelines and progress metrics.
Top Skills: RtlSemiconductor DesignSoftwareVerification
Reposted 20 Days AgoSaved
In-Office
San Diego, CA, USA
184K-273K Annually
Senior level
184K-273K Annually
Senior level
Artificial Intelligence • Automotive • Semiconductor
The role involves developing verification environments, writing test plans, debugging, and verifying SoC designs. It requires collaboration with designers and strong verification skills.
Top Skills: C/C++System VerilogUvm
Reposted 20 Days AgoSaved
In-Office
San Diego, CA, USA
115K-170K Annually
Mid level
115K-170K Annually
Mid level
Artificial Intelligence • Automotive • Semiconductor
Contribute to the functional verification environment, writing test plans, developing tests, debugging failures, and streamlining tools for multi-core SoC design.
Top Skills: C/C++System VerilogUvm
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