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The Principal Engineer will design critical IP, implement specifications, ensure quality, and collaborate across teams for digital IC design processes.

As a Principal Design Verification Engineer, you will develop verification architectures, write test plans, and ensure design compliance across various technologies and industries.

Lead full lifecycle execution for custom silicon programs, driving cross-functional teams to ensure schedule, quality, and cost, while managing risks and relationships with stakeholders.

Design and verify analog circuits for CMOS transceivers/SERDES products, requiring hands-on experience and innovative problem-solving skills.

The Trade Compliance Manager oversees U.S. and international trade compliance, ensuring adherence to regulations and managing compliance programs across Marvell's operations.

The Principal HRIS Analyst will specialize in HR systems and processes, lead HR technology solutions, and improve operational efficiency using Workday HCM. Responsibilities include managing change processes, supporting data-driven decision-making, and leading HRIS projects.

The intern will design and validate circuits for high-speed broadband ICs, focusing on analog design, performance measurement, and collaboration with teams for production support.

The Lead Analog Design Engineer will design sophisticated wireline transceivers and circuits for data center connectivity, collaborating with global teams and leading architectural investigations, implementations, and verifications of key analog systems.

The Senior Staff Engineer will lead NPI phases, analyze performance and yield, collaborate across teams, and enhance product testing processes.

As a Memory Layout Senior Staff Engineer, you will develop full-custom memory layouts, ensure verification closure, mentor junior engineers, and drive best practices in layout design.