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The Analog Design Junior role involves working on high-speed and optical transceivers for communication infrastructure. Responsibilities include designing integrated circuits, using CAD tools like Cadence, and gaining experience in analog design and layout techniques while collaborating with a dynamic team.

The Analog Design Engineer will design high-speed optical transceivers, analyze specifications, design at the transistor level, oversee layout, and mentor junior designers. This role requires collaboration across teams, managing tasks from pre-silicon to mass production, and bringing ICs from architecture to volume production.

The Senior Staff Design Engineer will design analog building blocks for Automotive and Ethernet PHY AFE, define specifications, build schematic designs, and collaborate with layout designers for mask design implementation, focusing on high-speed, high-linearity circuit design.

The Senior Engineer, Digital IC Design is responsible for developing behavior models of high-performance SerDes analog circuits for digital and system verification. Duties include creating accurate analog models in SystemVerilog, verifying model accuracy, documenting results, improving methodology, and collaborating with design teams for effective SerDes IP solutions.

As a Senior Engineer in Analog IC Design, you will design and improve transistor level circuits, utilizing CAD tools primarily Cadence. You will perform circuit analysis, simulations, and tests, iterating designs until they meet specifications. Collaboration with team members and attending design meetings is key to resolving issues and enhancing designs.

The Analog Mixed Signal IC Design Engineer will lead high-speed and high-performance SerDes development in advanced technology nodes, including 5nm and 3nm. Responsibilities include designing IP, collaborating with DSP and Analog teams, directing layout engineers, validating IP, and supporting product and customer needs.

As a Staff Engineer in Digital IC Design, you will design and verify digital circuits for high-speed communication ICs, enhance design methodology, and collaborate across teams to deliver competitive SerDes IP solutions. You will also be involved in RTL design, verification, synthesis, and timing analysis.