Top Tech Jobs & Startup Jobs

Leads global engineering applications and lab operations, defining modernization, cloud migration, integrated development platform, and Labs-as-a-Service strategies. Oversees engineering toolchains, lab provisioning, security, network architecture, governance, automation, resiliency, observability, and compliance. Partners with Engineering, IT, Security, and Facilities to standardize workflows, protect intellectual property, improve developer productivity, and enable scalable collaboration across global teams.

Develop accurate functional models and simulations for System-on-Chip designs within Marvell’s Virtual Platforms team. Collaborate with software and firmware teams, analyze simulation results, diagnose firmware issues, and promote virtual platform adoption. The role requires Python and C++ knowledge, understanding of firmware and software architecture, and familiarity with computer architecture; simulator experience with Virtualizer, Simics, QEMU, or gem5 is preferred.

Leads Marvell’s global trade compliance team across export controls, sanctions, imports, customs, classification, and trade facilitation. Architects scalable compliance systems and processes, oversees investigations and audits, manages metrics and corrective actions, supports M&A, partners with counsel on licensing and regulatory matters, and implements automation including AI tools. The role develops a global team, delivers training, collaborates across business functions, and travels internationally to support stakeholders and process improvements.

Design and develop low-level firmware and platform software for compute, storage, and ASIC systems. Build and maintain OpenBMC management firmware, drivers, platform services, telemetry, monitoring, and management protocols. Collaborate with hardware teams on platform bring-up, testing, validation, and debugging. Create automated test plans and contribute to firmware qualification and CI/CD pipelines.

Lead advanced packaging technology development for AI accelerators, networking, and HPC products. Define package architectures, chiplet topologies, substrates, interposers, power delivery, thermal envelopes, and reliability strategies. Conduct routing, signal integrity, power integrity, electromagnetic, mechanical, and thermal analyses. Develop proof-of-concept technologies, establish roadmaps, and drive productization, qualification, and volume readiness with silicon teams, OSATs, foundries, and suppliers.

Responsible for defining and implementing IT PMO strategy, managing project portfolios, overseeing program execution, and optimizing financial resources while ensuring stakeholder alignment and compliance with governance frameworks.

Supports senior field application engineers with customer schematic and layout reviews for optical modules and interconnect products. Assists with signal and power integrity simulations, product bring-up, performance testing, lab tuning, hardware/software debugging, customer issue resolution, and technical documentation. The internship provides hands-on exposure to PAM4 and coherent DSP technologies, optical communication systems, SerDes, and field application engineering workflows.

Supports customer optical-module firmware and software development, lab automation, module bring-up, TX/RX performance testing, hardware/software debugging, firmware flashing, register access, logging, compliance checks, and technical documentation. The intern works with senior field application engineers and customer teams on PAM4, coherent DSP, and optical technologies.

Own customer demand forecasting and revenue execution for major technology customers. Drive forecast accuracy, variance management, bookings, backlog, supply, allocation, logistics, and delivery issue resolution. Lead executive business reviews and translate customer demand signals into executable internal plans. Partner cross-functionally with Finance, Planning, Pricing, Legal, Supply Chain, and Sales while influencing teams without formal authority.

Lead the physical design organization and RTL-to-GDSII implementation of advanced SoCs. Responsibilities include methodology development, synthesis, floorplanning, power planning, place and route, clock tree synthesis, timing and signoff, physical verification, tapeout execution, team leadership, hiring, mentoring, resource planning, cross-functional alignment, and EDA tool deployment.