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42 Minutes AgoSaved
In-Office
2 Locations
Senior level
Senior level
Semiconductor
As a Senior Staff Engineer in Analog Layout, you will run simulations, collaborate across global teams, and deliver analog circuits through the full development cycle, ensuring high standards and effective communication.
Top Skills: Cadence Virtuoso
Reposted 16 Hours AgoSaved
In-Office
Santa Clara, CA, USA
31-63 Hourly
Internship
31-63 Hourly
Internship
Semiconductor
The intern will support SoC product lines, coordinate technical engagements, and assist in pre- and post-silicon processes, including training and debugging.
Top Skills: DspEthernetFirmwarePciePhysSerdesSoc
Reposted 16 Hours AgoSaved
In-Office
Westlake Village, CA, USA
142K-210K Annually
Senior level
142K-210K Annually
Senior level
Semiconductor
The role involves designing high-performance RF/Analog Receiver circuits, validating designs, and facilitating production transition while mentoring junior engineers.
Top Skills: AnalogCmosEda Cad ToolsMixed-Signal DesignRfSige
Reposted 16 Hours AgoSaved
In-Office
Santa Clara, CA, USA
169K-253K Annually
Senior level
169K-253K Annually
Senior level
Semiconductor
As a Senior Principal Digital IC Design Engineer, you will develop ASICs, ensure design quality, and mentor junior engineers. Lead RTL development and collaborate on verification activities.
Top Skills: Cdc)Design CompilerEsun)I2CI3CMdioPciePhy/Mac Layer Communication Protocols (EthernetPrimetimeRtl DesignSmbusSpiSueSynthesisTiming ClosureUa LinkUnix-Based Eda Tools (VcsVerification
Reposted 16 Hours AgoSaved
Córdoba, ARG
Internship
Internship
Semiconductor
The intern will design and implement coherent DSPs, model systems, develop verification protocols, and enhance both technical and communication skills.
Top Skills: CC++MatlabPythonVerilog
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Reposted 16 Hours AgoSaved
In-Office
Santa Clara, CA, USA
105K-158K Annually
Mid level
105K-158K Annually
Mid level
Semiconductor
The Staff Design Engineer will design, verify, and evaluate digital circuits for high-speed data communication ICs, improving methodologies and collaborating with teams to deliver competitive solutions.
Top Skills: Verilog,Vhdl,Perl,Tcl,Unix,Eda,Synopsys,Cadence,Primetime
Reposted 17 Hours AgoSaved
In-Office
Toronto, ON, CAN
Senior level
Senior level
Semiconductor
Design ASIC products focusing on micro-architecture, write specifications, implement low-power RTL designs, and collaborate on verification and post-silicon tasks.
Top Skills: AxiD2DEthernetHbmLpddr/DdrPciePerlPythonSystem VerilogTclUnix Shell
Reposted 17 Hours AgoSaved
In-Office
Santa Clara, CA, USA
129K-193K Annually
Expert/Leader
129K-193K Annually
Expert/Leader
Semiconductor
As a Principal Product Engineer, you will lead the entire lifecycle of Ethernet and AI Networking products, managing product introduction, quality improvements, and cross-functional collaboration.
Top Skills: Advantest 93KAte PlatformsData Analytics ToolsJmpSilicondashTeradyne
Reposted 17 Hours AgoSaved
In-Office
2 Locations
Senior level
Senior level
Semiconductor
Lead design teams in micro-architecture development, write specifications, implement RTL design, validate chips, and mentor junior engineers.
Top Skills: AhbAxiI2CPciePerlRtlSataTclUartUnix ShellUsb
Reposted 17 Hours AgoSaved
In-Office
Bangalore, Bengaluru Urban, Karnataka, IND
60K-130K Annually
Senior level
60K-130K Annually
Senior level
Semiconductor
The Digital IC Design Staff Engineer will implement micro-architectures, write specifications, and collaborate with verification and physical design teams on digital design projects.
Top Skills: Digital Ic DesignPerlRtl CodingSynthesisTclTiming ClosureUnixVerification Tools
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