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Lead a small data analytics engineering team to build ELT pipelines, ensure supplier data integrity, implement automated data validation, and create real-time dashboards (e.g., Spotfire). Use statistical modeling to detect and resolve manufacturing variability, support continuous improvement in semiconductor fab/assembly/test, and provide shift-based analytics support and feedback for rapid countermeasures.

Lead and manage an analog/power IC design team for BMS and power products. Provide technical project leadership, hands-on block-level analog design, mixed-mode simulations, layout guidance, lab evaluation, cross-functional coordination, customer engagement, and support tape-out, test development, and production ramp.

Design and deliver micro-architecture and front-end digital blocks for power management ASICs (PMIC). Lead RTL design in Verilog/SystemVerilog, CDC handling, synthesis, STA, formal verification, DFT support, silicon bring-up/debug, and P&R handoff. Produce specifications, test plans, constraints, and documentation while collaborating with cross-functional teams.

Lead analog layout design for DC-DC converters, controllers and drivers. Own floorplanning and full-chip layout, implement analog matching techniques, design for EM and reliability, drive DRC/LVS/PEX flows, collaborate globally, and minimize rework by following CAD and methodology guidelines.

Combine supplier quality engineering with data analytics to build ELT pipelines, validate data, create automated Spotfire/Power BI dashboards, perform statistical modeling to monitor and predict manufacturing variances, and drive continuous improvement with supplier and internal teams. Provides rotational weekend support.

Define and standardize functional safety (FuSa) architectures and requirements for PMICs, align with MCU/SoC teams, create reusable FuSa libraries, mentor FuSa engineers, drive tool-based FuSa workflows, liaise with customers and safety assessors, and optimize safety implementations for minimal cost and area.

The Principal Engineer will lead timing closure and synthesis for multi-die MCU designs, ensuring quality, power, and performance targets are met. Responsibilities include driving RTL-to-gate synthesis, optimizing design parameters, managing timing analysis, and collaborating with various design teams.

Lead supplier quality analytics for outsourced foundry, assembly, and test subcontractors. Build ELT pipelines, data validation, automated testing, and interactive dashboards (Spotfire/PowerBI). Use statistical modeling to track, predict, and resolve manufacturing variability, support continuous improvement, and provide weekend rotational support.

Lead quality improvement for new product introductions and volume ramp of semiconductor products. Define and track continuous improvement, analyze DPPM and returns, implement customer-specific requirements, coordinate cross-functional problem solving, ensure automotive standards compliance, engage with customer QA and suppliers, and represent on external standards committees.

The role involves managing requirements management tools, providing support and training to software development teams, ensuring compliance, and continuously improving tool performance and integration.