Senior Digital Engineer

Reposted 17 Hours Ago
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Bengaluru, Bengaluru Urban, Karnataka, IND
Hybrid
Senior level
3D Printing
The Role
Design and deliver micro-architecture and front-end digital blocks for power management ASICs (PMIC). Lead RTL design in Verilog/SystemVerilog, CDC handling, synthesis, STA, formal verification, DFT support, silicon bring-up/debug, and P&R handoff. Produce specifications, test plans, constraints, and documentation while collaborating with cross-functional teams.
Summary Generated by Built In
Company Description

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.

Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.

Job Description

Job Purpose and Dimensions:

  • Develop micro-architecture and front-end digital design deliverables from concept to silicon with minimal supervision
  • Develop digital functional blocks for various power management ASICs

Principal Accountabilities:

  • Lead optimized digital blocks design meeting functional and low power constraints and ensure spec compliance
  • Must have experience of defining Digital/Analog boundaries and digital design scope for Power Management ICs
  • Must have experience of defining the micro-architectures and sub-blocks for the ICs to ensure optimized Digital design, RTL design and Gate level netlist etc
  • Must be able to handle Clock Domain Crossing across multiple clock domains seamlessly and in a glitch free manner. Should be able to lead/collaborate for Logic Synthesis, Formal verification, Power estimation and STA
  • Should have experience of OTP, MTP, Efuse read/writes, controller design and data bus handling, Register read/write, Trimming of Analog parts/functions
  • Should be familiar with one or more Power Chip Communication I/Ps and protocols e.g. I2C, PMBUS, SPI etc.
  • Verification test planning, feature extraction and verification test case development
  • Experience with silicon debugs, root cause analysis of issues
  • Support DFT strategy and implementation
  • Interface with Placement and Route team for digital hand-off and post layout verification
  • Perform physical silicon device area and power evaluation where necessary
  • Author high-quality documentation for digital blocks

Key Performance Measures:

  • Micro-architecture, functional, test plan specification delivered according to project schedule
  • RTL coding using Verilog/System Verilog
  • First time right success rate
  • Pro-actively taking ownership of responsibilities
  • Deliver quality Spec and RTL within predictable schedule

Knowledge, Skills and Experience:

  • 3-6 years of experience in Logic design /micro-architecture / RTL coding
  • Must have hands on experience with Power product design, synthesis and timing analysis for complex Digital Circuits
  • Experience in Verilog/System-Verilog is a must
  • Experience working in semiconductor ideally PMIC with focus on mixed signal integrated circuits 
  • Hands on experience developing block and top-level timing constraints for STA and Placement and Route sign off 
  • Understanding of design constraints and synthesis scripts 
  • Work independently on straightforward tasks, with little direction from manager 
  • Ability to propose innovative solutions 
  • Results-oriented and able to deliver on-time under a tight schedule 
  • Cross cultural awareness and sensitivity 
  • Proactive attitude about own role and contribution to company goals 
  • Ability to work both independently and part of a team 
  • Flexible to undertake occasional international travel at short notice 
  • Excellent command of verbal and written English 
  • Concise and precise communication and interpersonal skills within multi-site and multi-cultural environment 

Qualifications

  • Degree level qualification in Electronics Engineering
  • 3-6 years of relevant experience required.

Key Relationships:

  • Design team, in particular TPL (Technical Project Leader) and digital leads/manager

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose ‘To Make Our Lives Easier.’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power.
 
With a diverse team of over 21,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘To Make Our Lives Easier.’     
 
At Renesas, you can: 

  • Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things.  
  • Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. 
  • Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day.    

Are you ready to own your success and make your mark?  

Join Renesas. Let’s Shape the Future together.  

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Skills Required

  • Degree in Electronics Engineering
  • 3-6 years relevant experience in logic design, micro-architecture, and RTL coding
  • Hands-on experience with Verilog/SystemVerilog and RTL coding
  • Experience in power product/PMIC digital design, synthesis and timing analysis
  • Ability to define digital/analog boundaries and digital design scope for PMICs
  • Define micro-architectures and sub-blocks, and deliver RTL and gate-level netlist
  • Clock Domain Crossing (CDC) design and glitch-free multi-clock domain handling
  • Experience with OTP, MTP, Efuse controller design and register read/write/trimming
  • Familiarity with power chip communication protocols (I2C, PMBus, SPI)
  • Develop block and top-level timing constraints for STA and P&R sign-off
  • Understanding of synthesis scripts and logic synthesis flow
  • Support DFT strategy and implementation
  • Experience with formal verification, power estimation, and post-layout verification
  • Silicon debug and root cause analysis experience
  • Excellent verbal and written English; concise communication in multi-site, multi-cultural teams
  • Willingness/flexibility to undertake occasional international travel at short notice

Renesas Electronics Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Renesas Electronics and has not been reviewed or approved by Renesas Electronics.

  • Fair & Transparent Compensation Feedback suggests pay is generally fair-to-good across many roles, with base pay aligned to prevailing market levels in multiple U.S. locations. Engineering and leadership tracks can be competitive on total compensation, reinforcing a sense that pay can meet market expectations in key job families.
  • Healthcare Strength Feedback suggests core medical, dental, and vision coverage is solid and well-regarded by employees. Day-one eligibility in U.S. roles is described, supporting confidence in access and continuity of care.
  • Leave & Time Off Breadth Feedback suggests PTO, paid holidays, sick time, and parental leave provide a comprehensive time-off framework. Company initiatives like Renesas Day and meeting-light Focus Fridays further support time away and balance.

Renesas Electronics Insights

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The Company
HQ: Tokyo
10,040 Employees

What We Do

We're the world's leading semiconductor manufacturer. Our mission is to make our lives easier and a world that's safer, healthier, greener, and smarter.

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