Top Tech Jobs & Startup Jobs

Develop and validate ATE test solutions and hardware for power management ICs. Create test programs, analyze results, support production test plans, debug test setups, and ensure test process compliance while collaborating with cross-functional teams.

Lead design and development of power SiP/module, wafer-level and flip-chip LGA packaging. Define substrate, vias, materials and PCB interfaces, develop Cu RDL and wafer thinning processes, qualify package technologies for consumer, industrial and automotive power applications, work with OSAT/CM on DOE and process specs, ensure production ramp, quality controls, and cross-functional resolution of issues. Maintain packaging roadmap and design rules.

Lead design, development, and qualification of advanced semiconductor packaging (flip-chip, WLP, 2.5D/3D, SiP, BGA). Define architecture, drive technology selection, perform SI/PI, thermal, and mechanical analysis, develop assembly/process flows, oversee qualification and failure analysis, collaborate with cross-functional teams and suppliers, and mentor junior engineers.

Manage subcontractor data integrity and ELT pipelines, implement data validation and governance, build automated dashboards (Spotfire/PowerBI), perform statistical analysis to detect drifts and defects, support continuous improvement in semiconductor manufacturing, and provide weekend rotational support.

Develop cross-platform C++/Qt desktop applications for chip configuration and testing. Design and implement features, write efficient, testable code, unit tests, and documentation; participate in architecture discussions, code reviews, and project ownership; follow CI/CD and version control workflows; collaborate across teams.

Lead RTL-to-GDSII physical implementation for high-performance SoCs, owning floorplanning, synthesis, placement, CTS, routing, and timing closure. Optimize PPA via multi-voltage domains, power gating (UPF), and datapath tuning. Run STA, EMIR/IR analysis, DRC/LVS, and equivalence checking. Automate flows with Tcl/Python/Perl and collaborate with RTL, DFT, and signoff teams to ensure manufacturability and performance targets.

Lead verification for complex SoC power-management designs: define verification plans and coverage, architect and implement UVM-based testbenches, run block-to-chip verification and gate-level simulations, integrate VIPs, debug failures, drive coverage closure, mentor engineers, and support ATE vector bring-up.

Lead system and application engineering for power products (BMS, automotive, industrial). Define product roadmaps, architect desktop/web applications, support sales/FAE with design-in and troubleshooting, perform FPGA prototyping and silicon board-level evaluation, create validation plans, drive system modelling, and hire/manage the team while collaborating across global functions and customers.

Lead and grow the MPU Application Engineering team in India to provide technical support, customer engagement, and solutions for Renesas MPU products. Collaborate with Sales, FAE, Product Marketing, and partners to support sales, resolve escalations, create reference designs, training materials, and proofs-of-concept, and influence product roadmap based on customer feedback and market trends.

Lead product marketing for Renesas Power & Analog portfolio in India: identify market opportunities, define products, support design-in and NPI, enable sales with technical training and collateral, execute go-to-market and demand forecasting, and coordinate cross-functional teams to launch and scale products.