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Responsible for advancing BCD/BCDlite technology development, coordinating process experiments, debugging high voltage devices, and supporting technical logistics for prototypes.

As an Associate Engineer in Process Engineering, you will develop and modify process formulations, establish SOPs, collaborate with cross-functional teams, and drive continuous improvement initiatives.

Identify and resolve yield and process integration issues, manage projects, collaborate with teams, and drive continuous improvement plans for defect reduction.

The Associate Engineer, Process Engineering develops and modifies process formulations, monitors quality, establishes SOPs, and collaborates with teams to improve process performance.

Lead process integration for development, optimization, and qualification of semiconductor devices. Design and analyze DOEs, partner with module engineers to improve yield and device performance, own technical problem solving, define design rules and test methodologies, and engage with internal and external customers to address technical queries.

In this role, you'll maintain equipment readiness and support processes in silicon wafer manufacturing, focusing on preventive maintenance, troubleshooting, and yield improvement using analytical tools and quality processes.

The Management Trainee will create engaging video content and assist in training initiatives, focusing on video production and multimedia skills.

Lead development and modification of process formulations, methods, and controls; establish SOPs and FMEAs; integrate equipment and materials; drive continuous improvement; collaborate cross-functionally; ensure EHS compliance and support product development and process performance.

Responsible for maintaining and supporting equipment readiness, performing preventive maintenance, troubleshooting, and driving equipment improvement plans.

Develop, deploy, and validate Process Design Kits (PDKs), compact models, and PCells for quantum devices and cryogenic control/readout ICs. Integrate PDKs into EDA flows, design test chips, run validation and QA (DRC/LVS), analyze device/circuit data for yield and reliability, and collaborate across device, process, and EDA teams to enable manufacturable quantum platforms.