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Reposted One Month AgoSaved
In-Office
Bangalore, Bengaluru Urban, Karnataka, IND
Senior level
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The Staff Physical Verification Engineer is responsible for full-chip signoff of complex SoC/ASIC designs, performing DRC, LVS, and PERC checks while leading methodologies and execution for tape-out readiness, and mentoring other engineers.
Top Skills: Cadence VirtuosoCalibreDrcEosErcEsdIcvLvsPercPerlPythonTclUnix Shell
Reposted One Month AgoSaved
In-Office
Bangalore, Bengaluru Urban, Karnataka, IND
Senior level
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The Staff Physical Design Engineer leads complex physical design for SoCs, mentors team members, and collaborates cross-functionally to ensure high-quality implementations meeting defined criteria.
Top Skills: Cadence InnovusPrimetimeRedhawkSynopsys Icc2TempusVoltus
Reposted One Month AgoSaved
In-Office
Dublin, IRL
Senior level
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The Principal Engineer will lead design verification for mixed-signal power converters, developing testbenches, verification plans, and metrics, while mentoring engineers and ensuring end-to-end verification readiness.
Top Skills: PythonSystemverilogTclUvmVerilog-Ams
Reposted One Month AgoSaved
In-Office
Limerick, IRL
Senior level
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The Principal Test Engineer will develop test solutions for mixed signal products, collaborate with design engineers, and maintain production yield through debugging and testing processes.
Top Skills: CC++Cadence AllegroMS OfficeOrcadUnixVisual Basic
Reposted One Month AgoSaved
In-Office
2 Locations
110K-152K Annually
Senior level
110K-152K Annually
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
Responsible for validation and characterization of high-speed ADC/DAC products, improving lab automation, and leading qualification efforts across multiple product lines.
Top Skills: AdcDacHigh-Speed ProbingMatlabOscilloscopesPythonRf Bench EquipmentSignal GeneratorsSpectrum Analyzers
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Reposted One Month AgoSaved
In-Office
Bangalore, Bengaluru Urban, Karnataka, IND
Senior level
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The Staff Modeling Engineer will lead modeling activities, manage a small team, develop and optimize models using various programming languages while ensuring alignment with project goals.
Top Skills: C++MatlabPythonSystemc
Reposted One Month AgoSaved
In-Office
Wilmington, MA, USA
149K-216K Annually
Senior level
149K-216K Annually
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The Principal Mixed-Signal/Analog Design Engineer designs high performance ICs, oversees product development, provides technical guidance, and collaborates with cross-functional teams.
Top Skills: Analog Ic DesignBehavioral ModelingCadence Design ToolsCircuit AnalysisHigh Voltage DesignMixed-Signal Ics
Reposted One Month AgoSaved
In-Office
Limerick, IRL
Senior level
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The role involves leading the design and architecture of embedded software systems, enhancing processes for hardware/software integration, and mentoring teams to improve development workflows.
Top Skills: CC++FpgaPythonRtosSoc
Reposted One Month AgoSaved
In-Office
Bangalore, Bengaluru Urban, Karnataka, IND
Senior level
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
Responsible for leading a team to design and integrate analog/mixed-signal ICs, overseeing circuit design, validation, and cross-functional collaboration.
Top Skills: Esd Protection MethodologySystemverilog
Reposted One Month AgoSaved
In-Office
Bangalore, Bengaluru Urban, Karnataka, IND
Senior level
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The Senior Digital Design Engineer will own physical implementation for IP blocks, develop floorplans, execute place-and-route, and mentor junior engineers while ensuring adherence to performance and design requirements.
Top Skills: Cadence InnovusPerlPythonTcl
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