Top Tech Jobs & Startup Jobs

Lead the architecture, design, implementation, verification, characterization, and debugging of RF, analog, mixed-signal, and digital IC circuits integrated into SoCs. Collaborate with system and product teams on specifications and circuit trade-offs, analyze non-idealities, test designs in the lab, define production test requirements, and report design and evaluation results.

Leads microarchitecture and RTL design for DSP modules, including filters, modulators, demodulators, and custom blocks. Integrates DSP subsystems into SoC platforms and develops ASIC solutions meeting power, performance, and area targets. Performs design verification using SystemVerilog, UVM, Python, or C, along with synthesis and static timing analysis. Collaborates across disciplines to solve complex digital communications and semiconductor design challenges.

Leads full-chip ASIC physical design for large programs, including implementation strategy, PPA optimization, closure, signoff readiness, and tapeout delivery. Defines physical design flows, methodologies, guidelines, and adoption plans; resolves design and flow issues; drives technology adoption and organization-wide improvements. Collaborates with front-end, layout, EDA, and program teams, represents physical design in program forums, maintains vendor relationships, hires and mentors engineers, and coordinates execution across teams.

Leads architecture, microarchitecture, RTL design, and integration of high-performance packet-processing, interface, and system-control blocks in multi-CPU SoCs. Develops scalable ASIC solutions for optical and wireless communications, applies digital design and verification methodologies, translates requirements into PPA-efficient implementations, and supports block verification, synthesis, static timing analysis, and design automation.

Architects, develops, debugs, tests, and maintains digital SOC design methodologies and EDA flows from RTL through GDS. Creates scripts, qualifies commercial EDA tools, verifies flow signoff, and establishes tool regressions. Collaborates with engineering IT, database, technology, and design teams to optimize compute infrastructure and resolve signoff issues. Leads projects, guides engineers, documents methodologies, trains design teams, supports flow setup, and drives consensus across business units and EDA vendors.

Leads development of communications ICs with advanced signal-processing blocks, assigning work, tracking progress, resolving technical issues, and prioritizing resources. Collaborates with RF, ASIC, software, marketing, and customer-facing teams. Mentors staff engineers, drives methodology improvements, creates training, encourages innovation and patents, and occasionally performs design or debugging work. Requires deep communications-system expertise and extensive experience in modulation, coding, SERDES, beamforming, or related technologies.

Develop and maintain automated test frameworks; perform functional, regression, stress, reliability, and performance testing; validate storage, networking, and accelerator software stacks; conduct kernel-level testing and debugging on Linux/BSD; analyze performance bottlenecks using observability tools; and lead technical validation initiatives with cross-functional teams.

Designs, verifies, and tests DSP and signal-impairment correction algorithms for broadband communications SoCs. Defines hardware/software partitioning for DSP, control, and datapath blocks, collaborates with RFIC, ASIC, and firmware teams, and mentors junior engineers through PHY-layer development. The role requires strong communications theory, modem architecture, mathematical, and analytical expertise.

Develops and enhances Voice over IP stacks, telephony DSP and SLIC applications for home gateway platforms. Responsibilities include tuning audio algorithms, debugging software, supporting customer IP integration, building audio-quality monitoring tools, and assisting with deployment, configuration, and QA automation. The role requires expert C programming, Linux kernel and networking experience, SIP/IMS voice signaling and media-processing expertise, real-time communication protocols, and familiarity with telephony standards, packet analysis, and security practices.

Design and verify digital RTL for wireless connectivity SoCs and IPs using VHDL or Verilog. Develop low-power, FPGA-friendly, DFT-compliant designs supporting clock domains, functional modes, and SoC integration. Perform simulation, FPGA prototyping, synthesis, and logic equivalence checks, debug design issues, and collaborate with RTL-to-netlist and backend teams throughout the IC lifecycle.