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Architect and implement software and firmware for confidential computing on RISC-V/Silicon platforms. Collaborate with CPU/SoC/security teams, implement TEEs, virtualization and peripheral security solutions, write and review hardware/software specifications, and engage customers, partners, and standards bodies to drive platform security.

Design and implement a Visual Studio Code plugin that interfaces with the SCD REST API, build robust responsive front-end UIs, mentor teammates, enforce code quality and automated front-end tests, collaborate with backend, QA, designers, and provide technical leadership for SiFive's Core Designer tooling.

Develop and maintain the high-performance C++ application for an FPGA-hosted hardware emulation framework. Collaborate with FPGA RTL designers, compiler developers, and RISC-V engineers to enable fast, debuggable, and cost-effective emulation for software and hardware co-design.

Manage cross-functional execution of processor core IP programs from scoping through release. Build schedules, track dependencies and risks, drive technical decisions, report status, and improve PM and product lifecycle processes.

The role involves architecting and maintaining the Verification Platform build system, developing tools and build flows, and educating teams on best practices.

The Design Verification Engineer will develop internal processor models and tools, create test cases, and collaborate with teams for verification needs.

Lead the architecture of physical implementation for high-speed CPU designs, focusing on automated ML-driven methodologies and PPA optimization, while interacting with EDA partners.

Develop and maintain core tools for microprocessor design, including simulation and build tools. Requires systems-level programming and tool validation experience.

The role involves designing and implementing CPU cores using RISC-V architecture, collaborating with various teams for verification and optimization, and ensuring high-quality design through documentation and teamwork.

Design and develop system software for RISC-V processors, including Linux kernel, device drivers, OpenSBI, u-boot, and Yocto/OpenEmbedded. Collaborate with architecture and hardware teams, debug complex multicore systems using GDB/JTAG/OpenOCD, and upstream and release open-source and proprietary software.