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Seeking a Senior Full Stack Engineer with expertise in Python, Django, REST, SQL, JavaScript, and TypeScript to design and develop a Visual Studio Plugin for SiFive's core IPs. Responsibilities include GUI and front-end development, code optimization, quality assurance, collaboration, and leadership. BS or MS degree required with proven experience as a full stack developer.

Design Verification Engineer responsible for generating test cases automatically, developing test benches, and analyzing coverage for memory subsystem designs. Requires 3+ years of experience with verification tools and methodologies, understanding of processor and SoC architecture, and strong analytical capabilities.

SiFive is looking for a CPU Microarchitecture/RTL Design Engineer to join their team of engineers passionate about designing industry-leading CPU cores based on RISC-V architecture. Responsibilities include architecting, designing, and implementing features and performance improvements in CPU core generators, collaborating with verification and physical implementation teams, and microarchitecture development. Requirements include a degree in computer science or engineering, expertise in CPU RTL design, proficiency in hardware design languages, and knowledge of RISC-V architecture.