Top Tech Jobs & Startup Jobs

Design and validate server subsystems, ensure designs meet functional specifications, create technical documentation, collaborate cross-functionally, manage JDMs, and deliver quality hardware products on time.

Design and run automated tests for PIC devices and modules, develop test algorithms and calibration procedures, define and execute design verification plans, produce verification documentation, and support PIC-level failure analysis and production yield improvement.

Design and maintain block/cluster/top-level ASIC verification environments, build reusable testbenches, create and run constrained-random and directed tests, implement coverage, run gate-level simulations, support emulation and post-silicon bring-up, and collaborate with designers and software teams to debug complex chip issues.

Lead architecture and design of DPU-accelerated host networking, security, and programmable network services. Define host vs. DPU responsibilities, distributed firewalling, routing, policy enforcement, telemetry, and failure modes. Guide SDK, pipeline, Linux networking, control-plane, and upgrade models. Mentor engineers and align cross-functional teams to deliver reliable, high-performance networking for AI clusters.

Design, prototype, and deliver DPU-accelerated host networking and network services. Build and integrate platform components (host agents, DPUs, firewalls, policy, telemetry), implement network functions (firewall, NAT, load balancing, VTEP), define APIs and operational workflows, debug distributed control/data plane issues, and own features from design through production support while mentoring peers.

Lead ASIC verification strategy and execution across programs: define methodology, architect reusable verification infrastructure, mentor teams, drive cross-functional efficiency, influence design-for-testability, and lead root-cause analysis for bring-up and post-silicon validation.

Lead the global KCS Center of Excellence to align knowledge management with AI-driven support. Drive strategy, governance, team leadership, cross-functional integration, technology adoption (AI, ML, Salesforce, Splunk, Tableau), and change management to improve knowledge quality, findability, automation, CSAT, and cost-to-serve metrics.

Drive enterprise sales for Splunk in New England: build pipeline, close and expand license/support/service deals, engage cross‑functional stakeholders and channels, apply consultative selling and analytics expertise to meet revenue targets.

Lead architecture and development of ASIC design verification environments (block, cluster, top-level). Build and maintain DV infrastructure, create and execute test plans, ensure coverage, support emulation and post-silicon bring-up, collaborate with designers and software/firmware teams, and drive ASIC bring-up and debug.

Develop and architect ASIC design verification infrastructure, create and execute simulation-based test plans, build testbench components (scoreboards, agents, sequencers, monitors), perform block-to-chip level verification, coverage and performance analysis, debug designs, and collaborate with hardware, software, architects, and vendors.