Top Tech Jobs & Startup Jobs

Lead identity and platform architecture as a cross-domain technical leader. Define long-term vision, drive large-scale distributed system design, mentor senior engineers, and influence company and industry direction for identity, security, and platform strategies.

Lead Product Quality Engineering strategy and teams across NPI, manufacturing, and field performance. Drive QMS governance, root cause analysis, corrective actions, advanced analytics, and continuous improvement to ensure product reliability and customer satisfaction. Influence executives and cross-functional partners to resolve complex quality issues and implement enterprise-wide quality initiatives.

Lead test engineering for next-generation silicon: define validation strategies, execute TRRs, perform root-cause failure analysis, develop test methodologies, optimize yield with design/process/manufacturing, mentor engineers, and collaborate cross-functionally to qualify test technologies and ramp products.

Lead architecture, design, and implementation of BIOS, BSP, kernel and user-space device drivers and diagnostics for high-bandwidth Cisco routing and embedded platforms. Drive Linux hardware bring-up, board validation, debugging, and test planning while collaborating across teams, mentoring engineers, and delivering production-ready software.

Lead full-chip ASIC physical design including floorplanning, RTL-to-GDSII implementation, clock mesh/HTree design, power grid planning, STA, power integrity, physical verification, and tool/flow improvements while collaborating with RTL, package, foundry, IP vendors, and EDA teams.

Lead and define ASIC verification strategy and methodology across programs. Architect scalable verification infrastructure, mentor teams, drive cross-functional improvements, influence ASIC design for verifiability, and lead root-cause analysis during bring-up and post-silicon validation.

Lead power-efficiency efforts from microarchitecture to physical implementation: map network workloads to RTL, develop production-like power vectors, perform PrimePower RTL analysis, propose and verify RTL/physical optimizations, collaborate with Physical Design and cross-functional teams to meet PPA targets.

Lead ASIC design efforts: define chip/micro-architecture, author specs, implement Verilog/SystemVerilog RTL, close timing with physical design, debug simulations and silicon, mentor junior engineers, and collaborate with verification and lab teams for post-silicon validation.

Apply quality domain expertise and advanced analytics to detect root causes, build predictive models, automate data pipelines, and translate findings into executive-level insights to improve hardware quality across the product lifecycle.

Design and implement DPU-based packet-processing pipelines and SDK integrations. Build firewall, ACL, NAT, tunneling, load-balancing, telemetry and host offload features. Develop across firmware/SDK, host drivers, Arm services, and user-space control. Debug across host/DPU/firmware/kernel boundaries, validate performance and scale, own features end-to-end, and contribute to reviews, documentation, and mentoring.