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Architect and build MLIR ecosystems, extending dialects while ensuring conversion paths. Collaborate with hardware engineers to integrate with PyTorch and modern frameworks.

Develop the next generation AI compiler for Mythic's analog compute, optimizing for dataflow architectures and collaborating with hardware engineers.

The role involves optimizing analog-aware software for neural networks, designing algorithms, improving software quality, and collaborating on hardware validation. Requires experience with complex algorithms and communication skills.

The Compiler Engineer will design compiler IRs and strategies for complex algorithmic workloads, collaborating with hardware engineers to enhance ISA and execution models, ensuring performance and correctness, while simplifying developer experiences.

Develop and maintain emulation platforms for AI-centric SoCs, integrate RTL, support firmware bring-up, debug co-design issues, and analyze AI workload performance.

Design and verify NVM IP macros and circuits for Mythics analog compute-in-memory products. Develop RNM/functional models, HV generators, x/y-paths, peripherals, and handshake circuits with analog compute blocks. Lead full-chip simulation, tapeout support, layout supervision, silicon debugging, and coordinate validation and backend teams to qualify production releases.