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Develop and freeze semiconductor process flows and recipes, implement process control and inspection methods, analyze defects and recommend corrective actions, ensure test methods, and support EHS requirements while collaborating across projects to prepare processes for manufacture.

Design and develop semiconductor process flows and recipes; create test methods; implement process control and inspection; analyze defects and recommend corrective actions; freeze processes for manufacturing readiness; ensure EHS compliance and collaborate across projects.

This role leads the cryogenic CMOS design enablement team, focusing on PDK development, modeling, characterization, and cross-functional collaboration in quantum technology design.

The Principal Engineer will collaborate on capacity planning, analyze factory output, and lead process improvements in a semiconductor manufacturing environment.

The Senior Director leads quantum technology initiatives at GF Labs, focusing on R&D strategy, team management, and ecosystem development to advance quantum computing capabilities.

Lead integration of semiconductor technologies for ion-trap quantum computing. Manage engineers, drive integration strategies, and ensure program delivery across various engineering teams.

This role involves developing and integrating superconducting interconnect and interposer technologies for quantum systems, focusing on low-loss signal propagation and cryogenic reliability.

This role involves mechanical design for electro-optical transceivers, creating designs, documentation, and collaborating with teams to meet specifications.

The Sr. Section Manager leads integration engineers in developing semiconductor strategies for ion-trap quantum computing, ensuring high performance and manufacturability.

The role involves leading a team of engineers to develop processes and materials for quantum technologies, ensuring manufacturability and performance while collaborating across multiple teams.