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The Senior Staff Signal Integrity Engineer drives SI/PI strategy for AI accelerators, leads modeling/simulation, optimizes power delivery networks, and provides technical mentorship.

Responsible for defining qualification strategies for AI compute platforms, ensuring hardware reliability through testing, failure analysis, and collaboration across teams.

Responsible for demand and supply planning for server systems, managing partner contracts, and ensuring inventory and customer order fulfillment through cross-functional collaboration.

Responsible for power estimation, architectural tool development for AI workloads, and optimizing performance monitoring in micro-architecture and RTL. Collaborate with teams for design integration and silicon validation.

As a Compiler Architect, you'll design and implement a scalable MLIR-based compiler for cloud-based AI inference, focusing on optimizing large-scale AI models and architecting efficient software pipelines for deployment.

As a Principal Software Engineer, you will develop and maintain software kernels for AI hardware, collaborating on full-stack optimization and compiler infrastructure.

Own transistor-level analog design for SerDes clocking, including PLLs, DLLs, phase interpolators, clock distribution, and CDR loops. Model loop dynamics, jitter, and phase noise; develop verification environments; drive advanced-node layout; provide behavioral models; and lead silicon bring-up and bench characterization. Collaborate with datapath, DSP, digital, and firmware teams to close timing, jitter, and calibration requirements across the SerDes macro.

Lead SoC architecture definition and delivery for AI accelerators. Analyze AI workloads, drive hardware/software co-design, performance modeling, simulation tools, kernel and networking fabric work, port and optimize customer workloads, and collaborate across RTL, DV, and software teams.

Design and implement efficient algorithms to optimize LLM inference on DNN accelerators. Collaborate with mathematicians, ML researchers, and engineers to apply advanced algorithmic and numerical techniques for high-impact generative AI performance improvements.

The Principal Architect will analyze ML workloads, contribute to hardware/software features for inference accelerators, and develop analytical performance models.