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Coordinates semiconductor supply chain activities with wafer fabrication and assembly/test vendors while providing financial forecasting, reporting, and analysis. Maintains purchase orders, evaluates inventory and supplier commitments against demand, manages bills of materials, identifies cost improvements, analyzes excess and obsolete inventory, supports audits and internal controls, and develops Power BI dashboards for Operations and Finance decision-making.

Own physical layout and verification of complex analog and mixed-signal ICs at block and full-chip levels. Develop floorplans, optimize placement, perform LVS and DRC verification, resolve manufacturability issues, and collaborate with analog, digital, packaging, and cross-functional teams through tapeout. The role requires expertise in analog CMOS circuits, device physics, EDA tools, high-voltage BCD and mixed-voltage designs, with preferred experience in high-speed, precision, data converter, and BiCMOS layouts.

Own and maintain test hardware, equipment, and programs for analog/mixed-signal IC production. Perform bench validation, DAC characterization, PCB debugging, data analysis, and documentation. Collaborate with hardware/firmware and applications teams to improve EVMs, reduce test time, support GR&R and correlation, and assist customer deployments and silicon validation.

Design and optimize high-speed precision CMOS analog circuits for automated test equipment products. Responsibilities include circuit simulation, layout, verification, post-layout and mixed-signal analysis, architecture optimization, IC characterization, test development, and qualification. The engineer owns circuit blocks across the full IC development lifecycle and collaborates with digital, layout, test, product, and applications engineering teams.

Leads analog architecture and design for complex ATE ICs, including circuit development, schematic and layout reviews, verification, mixed-signal simulation, silicon bring-up, characterization, and debugging. Provides technical leadership across projects, mentors engineers, establishes design standards, and collaborates with engineering, product, and customer teams to guide future product direction.

Lead NPI from first silicon to high-volume manufacturing for precision analog and mixed-signal ICs. Develop and optimize wafer sort and final test solutions (Teradyne UltraFlex IGXL), correlate bench and ATE results, establish production limits, design/validate test hardware (load boards, probe cards, sockets), perform silicon debug/root-cause analysis, support qualification and transfer to OSAT, and create automation tools using Python and JMP to improve throughput and quality.

Serves as the technical bridge between semiconductor engineering teams and customers. Responsibilities include identifying customer needs, recommending solutions, delivering technical presentations and demonstrations, supporting product evaluations, resolving technical questions, preparing proposals, influencing product development through customer feedback, and supporting product launches and training. The role builds customer relationships and requires approximately 25% to 40% travel.