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As a CPU Design Intern, you will develop RTL for RISC-V cores, gain knowledge in computer architecture, and work on performance and power optimization.

As a Senior Product Manager, you will articulate SiFive's product portfolio, collaborate with IP architects, and guide Sales during customer engagements. A strong background in product management within the semiconductor industry is required, along with technical marketing and customer interaction experience.

Lead the development of SiFive BSPs, creating roadmaps and supporting Yocto-based distributions for various platforms, collaborating with teams and ensuring best open source practices.

The SOC Architect will lead the development of high-performance SoCs, defining security features, and collaborating with product teams and customers to deliver system IPs.

Lead a performance engineering team to research and develop high-performance processor architectures, defining targets and guiding implementation in RTL, while analyzing performance bottlenecks.

Design interconnect IP, architect TileLink interconnect, enhance performance, integrate into SiFive's framework, perform verification, and maintain documentation.

Design and implement debug, trace, and profiling hardware, collaborate with cross-functional teams, and lead improvements in hardware design processes.

The Executive Business Partner / Assistant will support the CTO and EVP Engineering with executive tasks, business operations, strategic support, and communication, managing complex calendars and travel while driving operational efficiency.

Design and implement CPU power management, reset, and clocking solutions. Collaborate with teams to verify and optimize designs based on RISC-V architecture.

As a Datacenter System Software Architect at SiFive, you'll design RISC-V Linux systems for datacenters, engage with customers, and optimize performance across software and hardware.