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Seeking a Principal Engineer for Firmware Verification Engineering at Western Digital. Responsibilities include understanding firmware algorithms, host protocols, firmware development, integration, validation, and debugging in Python, C, and C++. Qualifications include a BS/MS degree in Computer Science or related field with 4 years of experience for BS or 2 years for MS.
Design and develop memory systems test platform software in Python and C, collaborate with memory systems teams on test design feedback, and perform system failure analysis on test environment issues. Basic understanding of SSD system level concepts and NAND management algorithms required.
The Digital Commerce Hybris Specialist will be responsible for the technical management, development, and optimization of the SAP Hybris platform. This role requires expertise in Hybris configuration, customization, integration, and performance tuning to support and advance eCommerce operations.
The Global Senior Contingent Workforce Compliance Manager at Western Digital is responsible for leading the evaluation, optimization, and implementation of processes related to the management of contingent workers. This role involves compliance oversight, policy development, vendor management, training, audit, monitoring, and risk management in relation to contingent workforce management.
Seeking a Senior Manager for the Static Timing Analysis (STA) function to lead a team of engineers responsible for timing performance and integrity of semiconductor designs. Requires deep STA expertise, leadership skills, and vision for process improvement. Responsibilities include team management, developing advanced STA methodologies, collaborating with cross-functional teams, automation of timing analysis processes, and project management. Qualifications include a Bachelor's or Master's degree in relevant field and 15 years of STA experience, with at least 3 years in a leadership role.
Seeking a Physical Design Implementation Lead with expertise in Static Timing Analysis to lead advanced semiconductor design projects and drive successful implementation of integrated circuits. Responsibilities include leading physical design efforts, performing static timing analysis, collaborating with cross-functional teams, and optimizing power, performance, and area.
The Technologist, ASIC Development Engineering role at Western Digital involves leading ASIC macro and micro-architecture activities in storage-based controllers, with strong knowledge in RTL/SOC design, synthesis, timing, low power design, code coverage, and power analysis. Responsibilities include mentoring juniors, defining design requirements, evaluating implementation trade-offs, supporting other teams, and improving design practices.
Responsible for the design, development, and support of HDD firmware, performance, and power features. Collaborate with teams to create innovative firmware solutions. Must have proficiency in C, C++, Python, and problem-solving skills.
Lead teams in developing manufacturing test processes and product features for hard drive technology. Analyze data, identify and resolve HDD failures, drive yield improvements, and train factory teams for technical transfer. Requires Bachelor's degree in Electronics, Engineering, or related field with strong problem-solving skills and experience in electrical or electronics industry.
Lead a team that verifies compatibility of storage drives in enterprise customer system environments. Responsible for configuring customer systems for testing, analyzing drive logs, managing test schedules and resources, and communicating status. Requires a BS degree in Computer Engineering, Electrical Engineering, or Computer Science and 5+ years of experience.
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